AMD-761 Datasheet, PDF (93/264 Pages) Advanced Micro Devices – AMD-761-TM System Controller Software/BIOS Design Guide

24081D—February 2002
Preliminary Information
AMD-761™ System Controller Software/BIOS Design Guide
Bit Definitions
Bit Name
31–24 Max_ReqQ_
Depth
23–10 Reserved
9 SBA
8–6 Reserved
5 R4G
4 FW
3 Reserved
2–0 Rates
AGP Status (Dev0:F0:0xA4)
Function
Maximum Command Requests
This field contains the maximum number of AGP command requests that this node
can manage.
Reserved
Sideband Addressing
This field is always 1, indicating that the AMD-761™ system controller supports sideband
addressing.
Reserved
Address Limit
This bit is always 0, indicating that the AMD-761 system controller does not support
addresses greater than 4 Gbytes.
Fast Write Transfer
This bit indicates supports of fast write transfers.
0 = Fast writes not supported
1 = Fast writes supported
Reserved
Rate Transfers
This field indicates that the AMD-761 system controller supports 1x (bit[0]), 2x (bit[1]), and
4X (bit[2]) transfers.
Programming Notes
Fast writes are disabled by default and are indicated in the status bit that reports this capability. Setting the FW_Enable bit
in the AGP 4X Dynamic Compensation register (Dev 0:F0:0xB4, bit 7) sets the FW bit in this register to indicate support of
this feature. Fast writes are enabled when both the FW_Enable bit (in the AGP 4X Dynamic Compensation register) and
the Fast_Writes bit in the AGP Command register are set.
AGP 4X transfers are supported and the 4X status bit is set by default in this register. This bit can be overridden by setting
the 4X_Override bit in the AGP 4X Dynamic Compensation register (Dev 0:F0:0xB4, bit 6).
Chapter 2
AMD-761™ System Controller Programmer’s Interface
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