AMD-761 Datasheet, PDF (245/264 Pages) Advanced Micro Devices – AMD-761-TM System Controller Software/BIOS Design Guide

24081D—February 2002
Preliminary Information
AMD-761™ System Controller Software/BIOS Design Guide
Registers
-----
Bits
0x0x0xC0h
Description
Memory Base Address
Register 0
31:23
CS_Base
Chip-Select Base 0
Bank 0 base address
Starting address of the bank
Map to AD[31:23]
22:16 Reserved
CS_Mask
Chip-Select Mask 0
15:7 Bank 0 address mask
Sizes the bank
Map to AD[31:23]
6:3
Reserved
Addr_Mode
2:1
Size of Device = Size of Bank x
(Primary SDRAM Width /8)
0
0x0x0xC4h
31:23
22:16
15:7
6:3
2:1
0
Enable/Disable Bank 1
Memory Base Address
Register 1
Chip-Select Base 1
Reserved
Chip-Select Mask 1
Reserved
Addr_Mode
Enable/Disable Bank 1
Initialized/
Required
Value
Actual
Value
Key
fcn( )
Notes
xxh xb
000b 0h
xxh xb
0h
xxb
xb
Set by memory sizing routines
0000_0000_0b = 0
0000_0001_0b = 16 Mbytes
0000_0010_0b = 32 Mbytes
B
0000_0011_0b = 48 Mbytes
0000_1000_0b = 128 Mbytes
0001_0000_0b = 256 Mbytes
0010_0000_0b = 512 Mbytes,
etc.
r
Set by memory sizing routines
0000_0000_1b = 16 Mbytes
0000_0001_1b = 32 Mbytes
0000_0011_1b = 64 Mbytes
B
0000_0111_1b = 128 Mbytes
0000_1111_1b = 256 Mbytes
0001_1111_1b = 512 Mbytes
0011_1111_1b = 1 Gbyte
0111_1111_1b = 1 Gbyte
r
01b=SDRAM device
SPD <256 Mbits
B
# 31
and
13
10b=SDRAM device
>128 Mbits
00b and 11b are reserved
B
0=Disable CS, 1=Enable CS
xxh xb
000b 0h
xxh xb
0h
xxb
xb
B
As 0x0x0xC0h above
r
As 0x0x0xC0h above
B
As 0x0x0xC0h above
r
As 0x0x0xC0h above
B
As 0x0x0xC0h above
B
As 0x0x0xC0h above
KEY:
B= Mandatory BIOS function
A= AGP setup by BIOS
c = Calculated/set by AMD-761™ internal logic
P= Power management setup by BIOS o = Setup by OS or OS driver F = Performance enhancement set by BIOS
r = Hardcoded and reserved
u = PCI operational user interface E = Elective BIOS function
Chapter 7
Recommended BIOS Settings
233