AMD-761 Datasheet, PDF (207/264 Pages) Advanced Micro Devices – AMD-761-TM System Controller Software/BIOS Design Guide

24081D—February 2002
Preliminary Information
AMD-761™ System Controller Software/BIOS Design Guide
5 PCI Bus Interface
This chapter provides additional details of some of the
AMD-761™ system controller PCI interface options that affect
system performance and compliance to the PCI Local Bus
Specification, Revision 2.2, as well as some recommended settings
for the AMD-761 system controller configuration register bits.
The features and options discussed are as follows:
„ PCI delayed transactions and target latency
„ PCI transaction ordering
„ Special arbitration options for Southbridges with legacy
DMA requirements
„ Performance enhancement options, including read prefetch-
ing and PCI chaining
5.1 Delayed Transactions and Ordering Rules Usage
The AMD-761 system controller provides three transaction
operating modes for the PCI bus host bridge interface as listed
in Table 32 on page 196. BIOS should program the bits listed in
Table 32 to only one of these combinations for best results.
Chapter 5
PCI Bus Interface
195