AMD-761 Datasheet, PDF (120/264 Pages) Advanced Micro Devices – AMD-761-TM System Controller Software/BIOS Design Guide

Preliminary Information
AMD-761™ System Controller Software/BIOS Design Guide
24081D—February 2002
DDR CLK/CS Pad Configuration
31
30
29
Bit
Reserved
Reset
0
0
X
R/W
R
23
Bit
Reset
0
R/W
22
21
Reserved
0
0
R
15
14
13
Bit
Reserved
Reset
0
0
X
R/W
R
7
Bit
Reset
0
R/W
6
5
Reserved
0
0
R
28
PSlewCLK
X
20
0
12
PSlewCS
X
4
0
27
26
X
X
R/W
Dev0:F1:0x90
25
24
NSlewCLK
X
X
19
18
17
16
PDrvCLK
NDrvCLK
X
X
X
X
R/W
11
10
9
8
NSlewCS
X
X
X
X
R/W
3
2
1
0
PDrvCS
NDrvCS
X
X
X
X
R/W
Register Description
This register allows BIOS control of the DDR clocks and chip-selects pad drive strength and slew rate.
108
AMD-761™ System Controller Programmer’s Interface
Chapter 2