AMD-761 Datasheet, PDF (40/264 Pages) Advanced Micro Devices – AMD-761-TM System Controller Software/BIOS Design Guide

Preliminary Information
AMD-761™ System Controller Software/BIOS Design Guide
24081D—February 2002
Table 6.
Device 0, Function 0 Configuration Register Map (Continued)
Host to PCI Bridge (Device 0, Function 0)
Reserved
Offset
0x68–0x6B
Reserved
0x6C–0x6F
Memory Status/Control
Reserved
Reserved
Reserved
Reserved
Boot Proc
PCI Arbitration Control
WHAMI
0x70–0x73
0x74–0x77
0x78–0x7B
0x7C–0x7F
0x80–0x83
0x84–0x87
Configuration Status
Reserved
Reserved
Reserved
Reserved
PCI Top of Memory
Reserved
AGP Capability Identifier
0x88–0x8B
0x8C–0x8F
0x90–0x93
0x94–0x97
0x98–0x9B
0x9C–0x9F
0xA0–0xA3
AGP Status
AGP Command
AGP Virtual Address Space Size
0xA4–0xA7
0xA8–0xAB
0xAC–0xAF
GART/AGP Mode Control
0xB0–0xB3
AGP 4X Dynamic Compensation
AGP Compensation Bypass
Memory Base Address 0
0xB4–0xB7
0xB8–0xBF
0xC0–0xC3
Memory Base Address 1
0xC4–0xC7
Reference
“Dev0:F0:0x70”
on page 66
“Dev0:F0:0x80”
on page 68
“Dev0:F0:0x84”
on page 70
“Dev0:F0:0x88”
on page 74
“Dev0:F0:0x9C”
on page 77
“Dev0:F0:0xA0”
on page 79
“Dev0:F0:0xA4”
on page 80
“Dev0:F0:0xA8”
on page 82
“Dev0:F0:0xAC”
on page 84
“Dev0:F0:0xB0”
on page 86
“Dev0:F0:0xB4”
on page 88
“Dev0:F0:0xB8”
on page 91
“Dev0:F0:0xC0”
on page 95
“Dev0:F0:0xC4”
on page 95
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AMD-761™ System Controller Programmer’s Interface
Chapter 2