AMD-761 Datasheet, PDF (152/264 Pages) Advanced Micro Devices – AMD-761-TM System Controller Software/BIOS Design Guide

Preliminary Information
AMD-761™ System Controller Software/BIOS Design Guide
24081D—February 2002
2.5.2
Table 16.
Feature
Status
Memory-Mapped Register Map
For registers that are accessed by the AMD-761 system
controller miniport driver during run time, the AMD-761
system controller implements a set of memory-mapped
registers for quick access. These are defined in Table 16.
AMD-761™ System Controller Memory-Mapped Registers
GART Memory-Mapped Control Registers
Feature Control Capabilities
Revision ID
GART Base Address
GART Cache Size
GART Cache Control
GART Cache Entry Control
Offset from
BAR1
0x00
0x04
0x08
0x0C
0x10
Reference
“Bar1 + 0x00” on
page 141
“Bar1 + 0x04” on
page 144
“Bar1 + 0x08” on
page 145
“Bar1 + 0x0C” on
page 146
“Bar1 + 0x10” on
page 147
BAR1 Initialization
Note that BIOS must program the Base Address 1:GART
Memory Mapped Register Base register (Dev 0:F0:0x14) prior
to accessing the memory-mapped registers. Refer to
“Dev0:F0:0x14” on page 39 for details of this register.
140
AMD-761™ System Controller Programmer’s Interface
Chapter 2