AMD-761 Datasheet, PDF (78/264 Pages) Advanced Micro Devices – AMD-761-TM System Controller Software/BIOS Design Guide

Preliminary Information
AMD-761™ System Controller Software/BIOS Design Guide
24081D—February 2002
Memory Status/Control
31
30
Bit
Reset
0
0
R/W
23
22
Bit
Reset
0
0
R/W
15
14
Bit
Reset
0
0
R/W
R/W
29
0
21
Reserved
0
R
13
0
28
27
Reserved
0
0
R
20
19
0
0
12
11
Reserved
0
0
R
Dev0:F0:0x70
26
25
24
0
0
0
18
17
16
Self_Ref_En
X
0
0
R/W
10
9
PCI_Pipe_En
PCI_Blk_WR
_En
0
0
R/W
8
Reserved
0
R
7
6
5
4
3
2
1
0
Bit
Reserved
Reserved Reserved Reserved Reserved Reserved
Reset
0
0
0
0
0
0
0
0
R/W
R
R
R
Register Description
This register provides general status and control for the memory controller.
Note that the Self_Ref_En bit in this register is not initialized at reset time, but must be initialized by BIOS for proper
operation. This action should be done prior to attempting DRAM access.
66
AMD-761™ System Controller Programmer’s Interface
Chapter 2