AMD-761 Datasheet, PDF (199/264 Pages) Advanced Micro Devices – AMD-761-TM System Controller Software/BIOS Design Guide

24081D—February 2002
Preliminary Information
AMD-761™ System Controller Software/BIOS Design Guide
4.2
The first option is the recommended mode and requires no
special setup in the AMD-761 system controller other than to
write a 0 to the Halt_Discon_En bit in the BIU Status/Control
register (Dev 0:F0:0x60, bit 18). This action causes the
AMD-761 system controller to react to the Halt special cycle on
the AMD Athlon system bus by forwarding the cycle to the PCI
bus but not attempting any processor disconnect. There is no
significant power savings in this mode.
The second option requires that the Halt_Discon_En bit be set,
which forces the AMD-761 system controller to initiate a
processor disconnect for lower power using the
PROCRDY/CONNECT protocol on the AMD Athlon™ system
bus. The PCI and AGP arbitration remains enabled in this
state, thus any DMA cycles that require a probe of the
processor’s cache causes the AMD-761 system controller to
reconnect using the PROCRDY/CONNECT protocol. There is
some additional latency imposed when this mode is enabled,
because each processor probe requires a reconnect of the CPU.
When the AMD Athlon system bus is disconnected, the
processor enters a very low-power state.
The AMD-766™ peripheral bus controller Southbridge does not
require any special initialization for either of the above
two modes.
C2 Stop Grant State Requirements
The processor enters the C2 Stop Grant state and issues a Stop
Grant special cycle on the AMD Athlon processor system bus in
response to the assertion of the STPCLK# input signal by the
Southbridge. The AMD-761 system controller supports two
options for the Stop Grant state:
1. Wait for a Stop Grant Special Cycle from both installed
processors and fForward the Stop Grant special cycle to the
PCI bus, but otherwise continue normal operation (no
significant processor power savings).
2. Disconnect the processor, enter self-refresh, and then
forward the Stop Grant special cycle to the PCI bus. This
power management state provides a lower power clock
Chapter 4
Power Management
187