AMD-761 Datasheet, PDF (220/264 Pages) Advanced Micro Devices – AMD-761-TM System Controller Software/BIOS Design Guide

Preliminary Information
AMD-761™ System Controller Software/BIOS Design Guide
24081D—February 2002
6.2 Feature Override Bits for AGP Cards
4X_Override
FW_Enable
The AMD-761 system controller supports 1X, 2X, and 4X AGP
rates as well as fast writes. The capability to support these
features is normally reported to the operating system via the
AGP Status register (Dev 0:F0:0xA4) as defined by the
Accelerated Graphics Port Interface Specification, Revision 2.0.
The operating system is thus able to determine and select the
highest rate supported by both the AGP card and the AMD-761
system controller.
The AGP interface of the AMD-761 system controller includes
two configuration bits that can be used to override the AGP
Status register and to prevent reporting 4X and fast write
capability. These bits are required to allow operation with AGP
cards that operate with 3.3-V signalling, but still report 4X
capability to the operating system. The problem thus created is
because the operating system attempts to place the card and
the AMD-761 system controller into 4X mode, but this speed is
not supported when 3.3-V signalling is selected. The solution is
for the AMD-761 system controller to report capability of a
maximum of 2X AGP speed in this configuration.
The two override bits are described below, and specific
programming recommendations are listed in Section 6.3.
This bit is used to force the 4X rate bit to 0 in the AGP Status
register (Dev 0:F0:0xA4, bit 2). After reset, the rate field in the
AGP Status register is set to all 1s, indicating support for a
maximum of 4X AGP speed. Setting the 4X_Override bit
automatically forces this field to 011, indicating a maximum of
2X support. This override mechanism is required because the
AGP Status register is defined as a read-only register in the
AGP specification.
This bit indirectly enables fast write support in the AMD-761
system controller. Fast write support is reported to the
operating system through the AGP Status register as described
above for the rate field, but the FW status bit in the AGP Status
register defaults to 0 (not supported) in the AMD-761 system
controller. The FW_Enable bit should be set if this feature is
desired.
Section 6.3 provides guidelines for setting these bits.
208
AGP Interface
Chapter 6