AMD-761 Datasheet, PDF (73/264 Pages) Advanced Micro Devices – AMD-761-TM System Controller Software/BIOS Design Guide

24081D—February 2002
Preliminary Information
AMD-761™ System Controller Software/BIOS Design Guide
BIU0 Status/Control
31
30
Bit Prb_En Reserved
Reset
0
0
R/W
29
Reserved
0
28
27
Reserved
0
0
R/W
23
22
21
20
19
Bit
Xca_RD_Cnt
Xca_WR_Cnt
Reset
0
0
0
0
0
R/W
R/W
15
14
13
12
11
Bit
Prb_Limit
Ack_Limit
Reset
0
0
0
0
1
R/W
R/W
R
7
6
Bit
SysDC_Out
_Dly
Reset
R/W
5
4
3
SysDC_In_Dly
Pinstrapping
R
26
Xca_Prb_Cnt
0
Dev0:F0:0x60
25
24
Xca_RD_Cnt
0
0
18
17
16
Halt_Discon
_En
Stp_Grant
_Discon_En
0
0
Prb_Limit
0
10
9
8
Bypass_En
SysDC_Out
_Dly
1
0
Pinstrapping
R/W
R
2
WR2_RD
1
0
RD2_WR
Register Description
This register provides general status and control for the AMD Athlon™ processor system bus interface.
Chapter 2
AMD-761™ System Controller Programmer’s Interface
61