AMD-761 Datasheet, PDF (162/264 Pages) Advanced Micro Devices – AMD-761-TM System Controller Software/BIOS Design Guide

Preliminary Information
AMD-761™ System Controller Software/BIOS Design Guide
24081D—February 2002
3.2
3.2.1
150
DIMM and memory device (memory chip) timing and
configuration data exist in the Serial Presence Detect (SPD)
EEPROM on the DIMM.
DDR DIMMS and DDR SDRAMs
The following section discusses DDR DIMMS and DDR
SDRAMS.
DDR Speed Grades
DDR DIMMs adhere to an alternate naming convention
associated with a corresponding data transfer rate. The data
rate is a function of the clock speed of the memory subsystem,
for example, 100-MHz clock or 133-MHz clock. Two names, and
their corresponding transfer rates, are currently defined and
implemented:
„ PC1600
„ PC2100
The PC1600 naming convention represents DIMMs with a data
transfer rate of 1600 Mbytes per second (1.6 Gbytes per
second). This data rate is calculated as follows:
PC1600 data transfer rate = (100-MHz clock) x (2 data
transfers/clock) x (8 bytes/transfer)
PC1600 data transfer rate = 1600 Mbytes per second
Similarly, the PC2100 designation represents DIMMs with a
data rate of 2100 Mbytes per second (2.1 Gbytes per second).
This data transfer rate is calculated as follows:
PC2100 data transfer rate = (133-MHz clock) x (2 data
transfers/clock) x (8 bytes/transfer)
PC2100 data transfer rate = 2100 Mbytes per second (rounded)
Note that the CAS latency (CL) parameter of the device does
not factor into the PC 1600 and PC2100 transfer rates
calculated above. The CAS latency setting is dependent on
device frequency, which is used in the calculation of the
transfer rates above. The CAS latency values are DDR device-
DDR SDRAM Interface
Chapter 3