AMD-761 Datasheet, PDF (253/264 Pages) Advanced Micro Devices – AMD-761-TM System Controller Software/BIOS Design Guide

24081D—February 2002
Preliminary Information
AMD-761™ System Controller Software/BIOS Design Guide
Registers
-----
Bits
Description
0x0x1x8h DDR PDL Config Register 15
31:24 Clk_Dly
23:16 SW_Cal_Dly
15:8 Cal_Dly
7:0 Act_Dly
0x0x1x8h DDR PDL Config Register 16
31:24 Clk_Dly
23:16 SW_Cal_Dly
15:8 Cal_Dly
7:0 Act_Dly
0x0x1x8h DDR PDL Config Register 17
31:24 Clk_Dly
23:16 SW_Cal_Dly
15:8 Cal_Dly
7:0 Act_Dly
Initialized/
Required
Value
Actual
Value
Key fcn( )
Notes
yyh
c
Half Period of the System Clock
Delay for DQS:
100 MHz = 69h
xxh
B FSB
133 MHz = 6Bh
yyh
c
SW_Cal_Dly in # of Buffers
xxh
c
From SW_Recal or Direct Write
yyh
c
Half Period of the System Clock
Delay for DQS:
xxh
B FSB ^{100 MHz = 69h}
133 MHz = 6Bh
yyh
c
SW_Cal_Dly in # of Buffers
xxh
c
From SW_Recal or Direct Write
yyh
c
Half Period of the System Clock
Delay for DQS:
100 MHz = 69h
xxh
B FSB
133 MHz = 6Bh
yyh
c
SW_Cal_Dly in # of Buffers
xxh
c
From SW_Recal or Direct Write
KEY: ^{B= Mandatory BIOS function}
A= AGP setup by BIOS
c = Calculated/set by AMD-761™ internal logic
P= Power management setup by BIOS o = Setup by OS or OS driver F = Performance enhancement set by BIOS
r = Hardcoded and reserved
u = PCI operational user interface E = Elective BIOS function
Chapter 7
Recommended BIOS Settings
241