AMD-761 Datasheet, PDF (29/264 Pages) Advanced Micro Devices – AMD-761-TM System Controller Software/BIOS Design Guide

24081D—February 2002
Preliminary Information
AMD-761™ System Controller Software/BIOS Design Guide
2.3.2
„ SysAddOut MSB = 0 and SysAddOut [35:24] = 1F8 and
command is RdBytes, an IACK special cycle is generated on
the primary PCI. SysAddOut[15:0] are asserted on PCI
AD[15:0] during this cycle. The data returned on the PCI is
returned to the processor.
„ SysAddOut MSB = 0 and SysAddOut [35:24] = 1F8 and
command is WrBytes, a PCI special cycle is generated on
the primary PCI. SysAddOut[15:0] are asserted on PCI
AD[15:0] during this cycle (address = data).
„ SysAddOut MSB = 0 and SysAddOut [35:24] = 1FC/1FD and
command is RdBytes or WrBytes, a PCI I/O command is
generated. SysAddOut[23:0] are asserted on PCI AD[23:0]
with the PCI I/O read or write command.
• Using Dev1:0x1C, I/O range address decoding, send to
either PCI or AGP/PCI.
Note: Low-order AMD Athlon processor system bus address bits, per
the AMD Athlon processor system bus specification,
SysAddOut only goes down to PA[3]. For mask operations, the
Mask[7:0] bits are encoded to logically create PA[2:0] in the
above.
PCI/AGP Master Address Decoding
The PCI controllers in the AMD-761 system controller must
consider the received PCI/AGP address in conjunction with the
BAR registers and the memory configuration registers to route
the transaction. The AMD-761 system controller does not allow
PCI masters to access I/O regions or main memory from
640 Kbyte to 1 Mbyte (unless the EV6_Mode bit is set as
described in “Bit Definitions PCI Arbitration Control
(Dev0:F0:0x84)” on page 71). This decoding is summarized as
follows:
1. AD[31:0] is less than the physical top of memory (from the
memory controller), DRAM is accessed.
2. AD[31:0] is above the physical top of memory and it falls
between Dev0:BAR0 and Dev0:BAR0+Len, address is to
AGP virtual address space and needs to be passed through
the GART before presentation to DRAM.
Chapter 2
AMD-761™ System Controller Programmer’s Interface
17