AMD-761 Datasheet, PDF (217/264 Pages) Advanced Micro Devices – AMD-761-TM System Controller Software/BIOS Design Guide

24081D—February 2002
Preliminary Information
AMD-761™ System Controller Software/BIOS Design Guide
6 AGP Interface
This chapter details some of the specific BIOS requirements for
programming the AMD-761™ system controller’s AGP
interface.
6.1 AGP Dynamic Compensation Requirements
To accommodate the high-speed requirements of 4X AGP rates,
the AMD-761 system controller provides circuitry designed to
automatically compensate for motherboard impedance on the
AGP interface over the range of temperature and voltage, by
dynamically adjusting the drive strength of the AMD-761
system controller I/O pads when 1.5-V signalling is selected by
the AGP card. This action requires proper initialization by
BIOS as described in this section. Two separate 32-bit
configuration registers are used to control AGP I/O
characteristics:
1. AGP Dynamic Compensation register, Dev 0:F0:0xB4
2. AGP Compensation Bypass register, Dev 0:F0:0xB8
Two modes are provided in the AGP compensation circuitry:
„ Automatically compensate once or at regular intervals by
adjusting the drive strengths of the AGP interface I/O cells.
In this case, BIOS is not required to program the drive
strength values.
„ Bypass the compensation and allow BIOS to write drive
strength values directly to the I/O cells.
The AMD-761 system controller allows the AGP strobe signals
(ADSTB[1:0], ADSTB[1:0]#) to be controlled independently
from all other AGP signals, including the ability to bypass
compensation for one set of signals while the other set is
compensated and vice-versa. The slew rate for the AGP
interface pins is also programmable by BIOS but is not changed
by the autocompensation logic.
Chapter 6
AGP Interface
205