AMD-761 Datasheet, PDF (50/264 Pages) Advanced Micro Devices – AMD-761-TM System Controller Software/BIOS Design Guide

Preliminary Information
AMD-761™ System Controller Software/BIOS Design Guide
24081D—February 2002
Bit Definitions
Bit Name
31–25 Base_Addr_High
Base Address 0: AGP Virtual Address Space (Dev0:F0:0x10)
Function
Base Address High
This bit field forms the upper part of BAR0. This field is loaded by BIOS software. Note that
when the GART enable bit in the AGP Virtual Address Space Size register is 0 (see
“Dev0:F0:0xAC” on page 84), these bits always return 0s to indicate no address space
should be allocated to AGP. Note that a write to this register must occur before a read
returns 0s with the GART enable bit cleared.
This bit field corresponds to bits [3:1] of the AGP Virtual Address Space Size register. When
bits [3:1] of that register are set, the R/W attributes in bits [30:25] in this register are
automatically set. BIOS software writes all 1s to this BAR register and then reads back the
register to determine how much memory is required for AGP as follows:
31 30 29 28 27 26 25
Memory
RW RW RW RW RW RW RW 32 Mbytes
RW RW RW RW RW RW R 64 Mbytes
RW RW RW RW RW R R 128 Mbytes
RW RW RW RW R R R 256 Mbytes
RW RW RW R R R R 512 Mbytes
RW RW R R R R R 1 Gbyte
RW R R R R R R 2 Gbytes
24–4 Base_Addr_Low Base Address Low
This bit field is hardwired to return 0s to indicate that the minimum allocated memory size
is 32 Mbytes.
3 Prefetchable Prefetchable
This bit is hardwired to 1 to indicate that this range is prefetchable.
2–1 Type
Type
This bit field is hardwired to indicate that this base register is 32 bits wide and mapping
can be performed anywhere in the 32-bit address space.
0 Memory
Memory
This bit is hardwired to 0 to indicate that this base address register maps into memory space.
Programming Notes
38
AMD-761™ System Controller Programmer’s Interface
Chapter 2