AMD-761 Datasheet, PDF (218/264 Pages) Advanced Micro Devices – AMD-761-TM System Controller Software/BIOS Design Guide

Preliminary Information
AMD-761™ System Controller Software/BIOS Design Guide
24081D—February 2002
Additional compensation details are provided in the following
sections, and specific programming recommendations are
listed in Section 6.3 on page 209.
6.1.1
The AGP 4X Dynamic Compensation Register
AGP compensation is controlled by the AGP 4X Dynamic
Compensation register (Dev 0:F0:0xB4). This register contains
additional fields that are not directly related to compensation
but control various attributes of the AMD-761 system
controller AGP interface. This section provides additional
details about the fields related to compensation.
PVal, NVal
The PVal and NVal are read-only fields that can be used to
determine the drive strength values being automatically
written to the AGP I/O pads by the compensation logic. These
apply only to the signals used for data transfer and
status/control—that is, not the AGP strobes. Typically the
values read back allow BIOS to determine if the correct
compensation resistors are installed on the motherboard.
Quantum_Cnt,
Always_Compensate
These fields are used to enable 1.5-V signalling compensation
at regular intervals, which is the suggested method for all 4X
AGP non-strobe signals. The Quantum_Cnt field can be
programmed for the maximum value (6.4 seconds), because it is
not expected that a more frequent adjustment is required. The
compensation is scheduled by the AMD-761 system controller
such that changing the drive strength values does not interfere
with AGP traffic.
If compensation bypass is selected for both the data transfer
and strobe pins (both the BYPXfer and BYPStrb bits are set in
the Compensation Bypass register) then these fields are
ignored.
Do_Compensate,
Comp3.3
These bits can be used in two cases:
„ To force a normal, single compensation cycle in 1.5-V
signalling mode to update the AGP I/O drive strengths, and
to prevent any further updates. In this case, the
Do_Compensate bit may be set (Comp3.3 should be
cleared), and the AGP interface must not be enabled until
this bit is read back as a 0, indicating that the compensation
cycle is complete.
206
AGP Interface
Chapter 6