AMD-761 Datasheet, PDF (252/264 Pages) Advanced Micro Devices – AMD-761-TM System Controller Software/BIOS Design Guide

Preliminary Information
AMD-761™ System Controller Software/BIOS Design Guide
24081D—February 2002
Registers
-----
Bits
Description
0x0x1x70h DDR PDL Config Register 11
31:24 Clk_Dly
23:16 SW_Cal_Dly
15:8 Cal_Dly
7:0 Act_Dly
0x0x1x74h DDR PDL Config Register 12
31:24 Clk_Dly
23:16 SW_Cal_Dly
15:8 Cal_Dly
7:0 Act_Dly
0x0x1x78h DDR PDL Config Register 13
31:24 Clk_Dly
23:16 SW_Cal_Dly
15:8 Cal_Dly
7:0 Act_Dly
0x0x1x7Ch DDR PDL Config Register 14
31:24 Clk_Dly
23:16
15:8
7:0
SW_Cal_Dly
Cal_Dly
Act_Dly
Initialized/
Required
Value
yyh
xxh
yyh
xxh
yyh
xxh
yyh
xxh
yyh
xxh
yyh
xxh
yyh
xxh
yyh
xxh
Actual
Value
Key fcn( )
Notes
c
Half Period of the System Clock
Delay for DQS:
100 MHz = 69h
B FSB
133 MHz = 6Bh
c
SW_Cal_Dly in # of Buffers
c
From SW_Recal or Direct Write
c
Half Period of the System Clock
Delay for DQS:
B FSB ^{100 MHz = 69h}
133 MHz = 6Bh
c
SW_Cal_Dly in # of Buffers
c
From SW_Recal or Direct Write
c
Half Period of the System Clock
Delay for DQS:
100 MHz = 69h
B FSB
133 MHz = 6Bh
c
SW_Cal_Dly in # of Buffers
c
From SW_Recal or Direct Write
c
Half Period of the System Clock
Delay for DQS:
100 MHz = 69h
B FSB _{133 MHz = 6Bh}
c
SW_Cal_Dly in # of Buffers
c
From SW_Recal or Direct Write
KEY:
B= Mandatory BIOS function
A= AGP setup by BIOS
c = Calculated/set by AMD-761™ internal logic
P= Power management setup by BIOS o = Setup by OS or OS driver F = Performance enhancement set by BIOS
r = Hardcoded and reserved
u = PCI operational user interface E = Elective BIOS function
240
Recommended BIOS Settings
Chapter 7