XR72L52 Datasheet, PDF (68/480 Pages) Exar Corporation – TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L52
REV. 1.0.1
xr
TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
The Part Number register can be used by System-level software to identify this particular device as the
XRT72L52 Two Channel DS3/E3 Framer IC. The value of the Part Number register is 0x08.
2.3.2.4 Version Number Register
The Version Number register permits the user’s software to identify the revision number of the part. The very
first revision of the part will contain the value 0x01. Revision B has Revision ID 0x03.
VERSION NUMBER REGISTER (ADDRESS = 0X03)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Version Number Value
RO
RO
RO
RO
RO
RO
RO
RO
0
0
0
0
0
0
1
1
2.3.2.5 Block Interrupt Enable Register
BLOCK INTERRUPT ENABLE REGISTER (ADDRESS = 0X04)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
RxDS3/E3
Interrupt
Enable
Not Used
R/W
RO
RO
RO
RO
0
0
0
0
0
BIT 2
RO
0
BIT 1
TxDS3/E3
Interrupt
Enable
R/W
0
BIT 0
One-Second
Interrupt
Enable
R/W
0
Bit 7 - RxDS3/E3 Interrupt Enable
This Read/Write bit-field permits the user to enable or disable all Receive Section related interrupts at the
Block Level.
Setting this bit-field to "0" disables all Receive Section related Interrupts within the XRT72L52.
Setting this bit-field to "1" enables the Receive Section related Interrupts (within the XRT72L52) at the block
level.
NOTE: Setting this bit-field to "1" does not enable all Receive Section related Interrupts. Each of these interrupts can still
be disabled at the Source Level. However, setting this bit-field to "0" does disable all Receive Section related Interrupts.
Bit 1 - TxDS3/E3 Interrupt Enable
This Read/Write bit-field permits the user to enable or disable all Transmit Section related interrupt at the Block
Level.
Setting this bit-field to "0" disables all Transmit Section related Interrupts within the XRT72L52.
Setting this bit-field to "1" enables the Transmit Section related Interrupts (within the XRT72L52) at the block
level.
NOTE: Setting this bit-field to "1" does not enable all Transmit Section related Interrupts. Each of these interrupts can still
be disabled at the Source Level. However, setting this bit-field to "0" does disable all Transmit Section related Interrupts.
Bit 0 - One-Second Interrupt Enable
This Read/Write bit-field permits the user to enable or disable the One-Second Interrupt. If this interrupt is en-
abled, then the XRT72L52 generate interrupts to the µC/µP at one-second intervals.
Setting this bit-field to "0" disables the One-Second Interrupt. Conversely, setting this bit-field to "1" enables
the One-Second Interrupt.
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