XR72L52 Datasheet, PDF (309/480 Pages) Exar Corporation – TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
XRT72L52
REV. 1.0.1
2. This selection also effects the Transmit E3 Framer Line Interface Output Mode
5.3.1.2 Bipolar Decoding
If the Receive E3 LIU Interface block is operating in the Bipolar Mode, then it will receive the E3 data pulses via
both the RxPOS, RxNEG, and the RxLineClk input pins. Figure 118 presents a circuit diagram illustrating how
the Receive E3 LIU Interface block interfaces to the Line Interface Unit while the Framer is operating in Bipolar
mode. The Receive E3 LIU Interface block can be configured to decode either the AMI or HDB3 line codes.
FIGURE 118. INTERFACING THE XRT72L52 FRAMER IC TO THE XRT73L00 DS3/E3/STS-1 LIU
TxSER
TxInClk
TxFrame
NIBBLEINTF
RESETB
INTB
CSB
RW
DS
AS
INTB
A[8:0]
D[7:0]
VDD
RxSer
RxClk
RxFrame
RxLOS
RxOOF
RxRED
RxAIS
U1
45
43
TxSer/SndMsg
61 ^TxInClk
TxFrame
25
NibIntf
28
Reset
13
8 ^Int
7 ^CS
10 ^WR_R/W
9 ^RD_DS
6 ^ALE_AS
RDY_DTCK
15
16 ^A0
17 ^A1
18 ^A2
19 ^A3
20 ^A4
21 ^A5
22 ^A6
23 ^A7
A8
32
33 ^D0
34 ^D1
35 ^D2
36 ^D3
37 ^D4
38 ^D5
39 ^D6
D7
27
MOTO
86
88 ^RxSer/RxIdle
90 ^RxClk
RxFrame
95
94 ^RxLOS
93 ^RxOOF
87 ^RxRed
RxAIS
XRT72L50
65
TxPOS
64
TxNEG
63
TxLineClk
79
DMO
78
ExtLOS
77
RLOL
69
LLOOP
70
RLOOP
68
TAOS
67
TxLev
EncoDis ⁶⁶
71
Req
76
RxPOS
75
RxNEG
74
RxLineClk
U2
37
TPDATA
38
TNDATA
36
TCLK
4
DMO
24
RLOS
23
RLOL
14
LLB
15
RLB
2
TAOS
1
TxLEV
21 _ENCODIS
12
REQDIS
33
RPOS
32
RNEG
31
RCLK1
XRT73L00
41
TTIP
40
TRING
44
MTIP
43
MRING
1 R3 2
270
1 R4 2
270
R1
1
2
36
1 T1 5
R2
1
2
36
4
8
1:1
TTIP
TRING
8
RTIP
9
RRING
C1
1
2
0.01uF
R5
37.5
R6
37.5
1 T2 5
4
8
1:1
RTIP
RRING
5.3.1.2.1 AMI Decoding
AMI or Alternate Mark Inversion, means that consecutive "one's" pulses (or marks) will be of opposite polarity
with respect to each other. This line code involves the use of three different amplitude levels: +1, 0, and -1.
The +1 and -1 amplitude signals are used to represent one's (or mark) pulses and the "0" amplitude pulses (or
the absence of a pulse) are used to represent zeros (or space) pulses. The general rule for AMI is: if a given
mark pulse is of positive polarity, then the very next mark pulse will be of negative polarity and vice versa. This
alternating-polarity relationship exists between two consecutive mark pulses, independent of the number of ze-
ros that exist between these two pulses. Figure 119 presents an illustration of the AMI Line Code as would ap-
pear at the RxPOS and RxNEG pins of the Framer, as well as the output signal on the line.
FIGURE 119. ILLUSTRATION OF AMI LINE CODE
Data 1 0 1 1 0 0 0 1 0 1 1 1 1 0 1 1 0 1 1 0 0 1 1 0 0 0 0 1
Line Signal
RxPOS
RxNEG
293