XR72L52 Datasheet, PDF (33/480 Pages) Exar Corporation – TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
XRT72L52
REV. 1.0.1
PIN DESCRIPTION
PIN #
139
140
141
142
PIN NAME
TxOH[0]/
TxHDLCDat5[0]
TxOHIns[0]/
TxHDLCDat4[0]
VDD
TxOHEnable[0]/
TxHDLCDat7[0]
TYPE
DESCRIPTION
I Transmit Overhead Input Pin:
The Transmit Overhead Data Input Interface accepts the overhead data via this
input pin and inserts into the overhead bit position within the very next outbound
DS3 or E3 frame. If the TxOHIns pin is pulled "High", the Transmit Overhead
Data Input Interface samples the data at this input pin (TxOH) on the falling
edge of the TxOHClk output pin. If the TxOHIns pin is pulled "Low", then the
Transmit Overhead Data Input Interface does NOT sample the data at this input
pin (TxOH) and this data is ignored.
Transmit HDLC Data Input - 5:
This pin accepts bit 5 TxHDLC data when the HDLC controller is turned on.
I Transmit Overhead Data Insert Input:
Asserting this input signal (e.g., setting it "High") enables the Transmit Overhead
Data Input Interface to accept overhead data from the Terminal Equipment.
While this input pin is "High", the Transmit Overhead Data Input Interface sam-
ples the data at the TxOH input pin on the falling edge of the TxOHClk output
signal.
Setting this pin "Low" configures the Transmit Overhead Data Input Interface to
NOT sample (e.g., ignore) the data at the TxOH input pin on the falling edge of
the TxOHClk output signal.
NOTE: If the Terminal Equipment attempts to insert an overhead bit that cannot
be accepted by the Transmit Overhead Data Input Interface, (e.g., if the Termi-
nal Equipment asserts the TxOHIns signal, at a time when one of these non-
insertable overhead bits are being processed); that particular insertion effort is
ignored.
Transmit HDLC Data Input - 4:
This pin accepts bit 4 TxHDLC data when the HDLC controller is turned on.
**** Power Supply 3.3V + 5%
O Transmit Overhead Input Enable:
The XRT72L52 asserts this signal for one TxInClk period just prior to the instant
that the Transmit Overhead Data Input Interface is sampling and processing an
overhead bit.
If the Terminal Equipment intends to insert its own value for an overhead bit into
the outbound DS3 or E3 frame, it is expected to sample the state of this signal
upon the falling edge of TxInClk. Upon sampling the TxOHEnable "High", the
Terminal Equipment should (1) place the desired value of the overhead bit onto
the TxOH input pin and (2) assert the TxOHIns input pin. The Transmit Over-
head Data Input Interface block samples and latches the data on the TxOH sig-
nal upon the rising edge of the very next TxInClk input signal.
I ^{Transmit HDLC Data Input - 7:}
This pin accepts bit 7 TxHDLC data when the HDLC controller is turned on.
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