XR72L52 Datasheet, PDF (152/480 Pages) Exar Corporation – TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L52
REV. 1.0.1
xr
TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
• Ignores any signal at the TxInClk input pin.
• The XRT72L52 outputs a 44.736MHz clock signal via the RxOutClk output pin. This clock signal functions
as the Transmit Payload Data Input Interface block clock signal.
• The XRT72L52 uses the rising edge of the RxOutClk signal to latch in the data residing on the TxSer input
pin.
Serial Mode
The XRT72L52 accepts the DS3 payload data from the Terminal Equipment in a serial-manner via the TxSer
input pin. The Transmit Payload Data Input Interface block samples this data on the rising edge of the RxOut-
Clk signal.
Delineation of outbound DS3 frames
The XRT72L52 pulses the TxFrame output pin "High" for one bit-period coincident with the XRT72L52 pro-
cessing the last bit of a given DS3 frame.
Sampling of Payload Data from the Terminal Equipment
The XRT72L52 samples the data at the TxSer input on the rising edge of RxOutClk.
Interfacing the Transmit Payload Data Input Interface block of the XRT72L52 to the Terminal Equipment
for Mode 1 Operation
This is illustrated in Figure 32.
FIGURE 32. THE TERMINAL EQUIPMENT BEING INTERFACED TO THE TRANSMIT PAYLOAD DATA INPUT INTERFACE
BLOCK FOR MODE 1(SERIAL/LOOP-TIMED) OPERATION
4 4.736M H z
Clock Source
D S 3 _ C lo c k _ In
D S 3_D ata_O ut
T x_S ta rt_of_F ra m e
D S 3_O v erhead_ Ind
R x O u tC lk
TxSer
T xF ram e
T xO H _Ind
N ib In t
Term inal Equipm ent
DS3 Fram er
Mode 1, Operation of the Terminal Equipment
When the XRT72L52 is operating in this mode it functions as the source of the 44.736MHz clock signal via the
RxOutClk signal. This clock signal is used as the Terminal Equipment Interface clock by both the XRT72L52
and the Terminal Equipment.
The Terminal Equipment serially outputs the payload data of the outbound DS3 data stream via its
DS3_Data_Out pin. The Terminal Equipment updates the data on the DS3_Data_Out pin upon the rising edge
of the 44.736 MHz clock signal at its DS3_Clock_In input pin as depicted in Figure 32 and Figure 33.
The XRT72L52 latches the outbound DS3 data stream from the Terminal Equipment on the rising edge of the
RxOutClk signal.
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