XR72L52 Datasheet, PDF (266/480 Pages) Exar Corporation – TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L52
REV. 1.0.1
xr
TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
In this case, the Terminal Equipment has the responsibility of providing the framing reference signal by pulsing
its Tx_Start_of_Frame output signal (and in turn, the TxFrameRef input pin of the XRT72L52), "High" for one-
bit period, coincident with the first bit of a new E3 frame. Once the XRT72L52 detects the rising edge of the in-
put at its TxFrameRef input pin, it will begin generation of a new E3 frame.
NOTES:
1. In this case, the Terminal Equipment is controlling the start of Frame Generation, and is therefore referred to as the
Frame Master. Conversely, since the XRT72L52 does not control the generation of a new E3 frame, but is rather
driven by the Terminal Equipment, the XRT72L52 is referred to as the Frame Slave.
2. If the user opts to configure the XRT72L52 to operate in Mode 2, it is imperative that the Tx_Start_of_Frame (or
TxFrameRef) signal is synchronized to the TxInClk input clock signal.
Finally, the XRT72L52 will pulse its TxOH_Ind output pin, one bit-period prior to it processing a given overhead
bit, within the outbound E3 frame. Since the TxOH_Ind output pin of the XRT72L52 is electrically connected to
the E3_Overhead_Ind whenever the XRT72L52 pulses the TxOH_Ind output pin "High", it will also be driving
the E3_Overhead_Ind input pin (of the Terminal Equipment) "High". Whenever the Terminal Equipment de-
tects this pin toggling "High", it should delay transmission of the very next E3 frame payload bit by one clock
cycle.
The behavior of the signals between the XRT72L52 and the Terminal Equipment for E3 Mode 2 Operation is il-
lustrated in Figure 91.
FIGURE 91. BEHAVIOR OF THE TERMINAL INTERFACE SIGNALS BETWEEN THE XRT72L52 AND THE TERMINAL
EQUIPMENT (MODE 2 OPERATION)
Terminal Equipment Signals
E3_Clock_In
E3_Data_Out
Tx_Start_of_Frame
E3_Overhead_Ind
Payload[1522] Payload[1523]
FAS, Bit 9
FAS, Bit 8
XRT72L5x Transmit Payload Data I/F Signals
TxInClk
TxSer
Payload[1522] Payload[1523]
TxFrameRef
TxOH_Ind
FAS, Bit 9
FAS, Bit 8
E3 Frame Number N
E3 Frame Number N + 1
Note: TxOH_Ind pulses high for
12 bit periods in order to
denote Overhead Data
(e.g., the FAS pattern
and the A & N bits).
Note: FAS Pattern bits will not be processed by the
Transmit Payload Data Input Interface.
Note: TxFrame pulses high to denote
E3 Frame Boundary.
How to configure the XRT72L52 to operate in this mode.
1. Set the NibIntf input pin "Low".
2. Set the TimRefSel[1:0] bit-fields (within the Framer Operating Mode Register) to "01" as depicted below.
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