XR72L52 Datasheet, PDF (368/480 Pages) Exar Corporation – TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L52
REV. 1.0.1
xr
TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
C. Delineation of Outbound E3 frames (Frame Slave Mode)
The Transmit Section of the XRT72L52 will use the TxInClk input as its timing reference, and will use the Tx-
FrameRef input signal as its framing reference. In other words, the Transmit Section of the XRT72L52 will ini-
tiate frame generation upon the rising edge of the TxFrameRef input signal).
D. Sampling of payload data, from the Terminal Equipment
In Mode 2, the XRT72L52 will sample the data, at the TxSer input pin, on the rising edge of TxInClk.
Interfacing the Transmit Payload Data Input Interface block of the XRT72L52 to the Terminal Equipment
for Mode 2 Operation
Figure 147 presents an illustration of the Transmit Payload Data Input Interface block (within the XRT72L52)
being interfaced to the Terminal Equipment, for Mode 2 operation.
FIGURE 147. THE TERMINAL EQUIPMENT BEING INTERFACED TO THE TRANSMIT PAYLOAD DATA INPUT INTERFACE
BLOCK FOR MODE 2 (SERIAL/LOCAL-TIMED/FRAME-SLAVE) OPERATION
3 4.368M H z
Clock Source
E 3 _ C lo c k _ In
E 3_D ata_O ut
T x_S tart_of_F ram e
E 3_O v erhead_Ind
T x In C lk
TxSer
T xF ram eR ef
T x O H _Ind
N ib In tf
Term inal Equipm ent
E3 Fram er
Mode 2 Operation of the Terminal Equipment
As shown in Figure 147, both the Terminal Equipment and the XRT72L52 will be driven by an external
34.368MHz clock signal. The Terminal Equipment will receive the 34.368MHz clock signal via its E3_Clock_In
input pin, and the XRT72L52 Framer IC will receive the 34.368MHz clock signal via the TxInClk input pin.
The Terminal Equipment will serially output the payload data of the Outbound E3 data stream, via the
E3_Data_Out output pin, upon the rising edge of the signal at the E3_Clock_In input pin. (Note: The
E3_Data_Out output pin of the Terminal Equipment is electrically connected to the TxSer input pin). The
XRT72L52 Framer IC will latch the data, residing on the TxSer input line, on the rising edge of the TxInClk sig-
nal.
In this case, the Terminal Equipment has the responsibility of providing the framing reference signal by pulsing
its Tx_Start_of_Frame output signal (and in turn, the TxFrameRef input pin of the XRT72L52), "High" for one-
bit period, coincident with the first bit of a new E3 frame. Once the XRT72L52 detects the rising edge of the in-
put at its TxFrameRef input pin, it will begin generation of a new E3 frame.
NOTES:
1. In this case, the Terminal Equipment is controlling the start of Frame Generation, and is therefore referred to as the
Frame Master. Conversely, since the XRT72L52 does not control the generationi of a new E3 frame, but is rather
driven by the Terminal Equipment, the XRT72L52 is referred to as the Frame Slave.
2. If the user opts to configure the XRT72L52 to operate in Mode 2, it is imperative that the Tx_Start_of_Frame (or
TxFrameRef) signal is synchronized to the TxInClk input clock signal.
352