XR72L52 Datasheet, PDF (365/480 Pages) Exar Corporation – TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
XRT72L52
REV. 1.0.1
The Transmit Terminal Input Interface is extremely flexible, in that it permits the user to make the following con-
figuration options.
• The Serial or the Nibble-Parallel Interface Mode
• The Loop-Timing or the TxInClk (Local Timing) Mode
Further, if the XRT72L52 has been configured to operate in the TxInClk mode, then the user has two additional
options.
• The XRT72L52 is the Frame Master (e.g., it dictates when the Terminal Equipment will initiate the transmis-
sion of data within a new E3 frame).
• The XRT72L52 is the Frame Slave (e.g., the Terminal Equipment will dictate when the XRT72L52 initiates
the transmission of a new E3 frame).
Given these three set of options, the Transmit Terminal Input Interface can be configured to operate in one of
the six (6) following modes.
• Mode 1 - Serial/Loop-Timed Mode
• Mode 2 - Serial/Local-Timed/Frame Slave Mode
• Mode 3 - Serial/Local-Timed/Frame Master Mode
• Mode 4 - Nibble/Loop-Timed Mode
• Mode 5 - Nibble/Local-Timed/Frame Slave Mode
• Mode 6 - Nibble/Local-Timed/Frame Master Mode
Each of these modes are described, in detail, below.
6.2.1.1 Mode 1 - The Serial/Loop-Timing Mode
The Behavior of the XRT72L52
If the XRT72L52 has been configured to operate in this mode, then the XRT72L52 will behave as follows.
A. Loop-Timing (Uses the RxLineClk signal as the Timing Reference)
Since the XRT72L52 is configured to operate in the loop-timed mode, the Transmit Section (of the XRT72L52)
will use the RxLineClk input clock signal (e.g., the Recovered Clock signal, from the LIU) as its timing source.
When the XRT72L52 is operating in this mode it will do the following.
1. It will ignore any signal at the TxInClk input pin.
2. The XRT72L52 will output a 34.368MHz clock signal via the RxOutClk output pin. This clock signal func-
tions as the Transmit Payload Data Input Interface block clock signal.
3. The XRT72L52 will use the rising edge of the RxOutClk signal to latch in the data residing on the TxSer
input pin.
B. Serial Mode
The XRT72L52 will accept the E3 payload data from the Terminal Equipment, in a serial-manner, via the TxSer
input pin The Transmit Payload Data Input Interface will latch this data into its circuitry, on the rising edge of
the RxOutClk output clock signal.
C. Delineation of Outbound E3 frames
The XRT72L52 will pulse the TxFrame output pin "High" for one bit-period, coincident with the XRT72L52 pro-
cessing the last bit of a given E3 frame.
D. Sampling of Payload Data, from the Terminal Equipment
In Mode 1, the XRT72L52 will sample the data at the TxSer input, on the rising edge of RxOutClk.
Interfacing the Transmit Payload Data Input Interface block of the XRT72L52 to the Terminal Equipment
for Mode 1 Operation
Figure 145 presents an illustration of the Transmit Payload Data Input Interface block (within the XRT72L52)
being interfaced to the Terminal Equipment, for Mode 1 operation.
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