XR72L52 Datasheet, PDF (435/480 Pages) Exar Corporation – TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
XRT72L52
REV. 1.0.1
• It will generate a FEBE Event interrupt to the Microprocessor/Microcontroller. Hence, the Receive E3
Framer block will set bit 4 (FEBE Interrupt Status) within the Rx E3 Framer Interrupt Status Register - 2, as
depicted below.
RXE3 INTERRUPT STATUS REGISTER - 2 (ADDRESS = 0X15)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Not Used TTB Change Not Used
Interrupt Status
FEBE Inter-
rupt Status
FERF Inter- BIP-8 Error Framing Byte RxPld Mis
rupt
Interrupt Status Error Interrupt _{Interrupt Status}
Status
Status
RO
RUR
RO
RUR
RUR
RUR
RUR
RUR
0
0
0
1
0
0
0
0
• Increment the PMON Received FEBE Event Count register - MSB/LSB, which is located at 0x56 and 0x57 in
the Framer Address space. The byte-format of these registers are presented below.
PMON FEBE EVENT COUNT REGISTER - MSB (ADDRESS = 0X56)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
FEBE Event Count - High Byte
RUR
RUR
RUR
RUR
RUR
RUR
RUR
RUR
0
0
0
0
0
0
0
0
PMON FEBE EVENT COUNT REGISTER - LSB (ADDRESS = 0X57)
BIT 7
RUR
0
BIT 6
RUR
0
BIT 5
RUR
0
BIT 4
BIT 3
FEBE Event Count - Low Byte
RUR
RUR
0
0
BIT 2
RUR
0
BIT 1
RUR
0
BIT 0
RUR
0
The user can determine the total number of FEBE Events (e.g., E3 frames that have been received with the
FEBE bit-field set to “1”) that have occurred since the last read of this register. This register is reset-upon-read.
6.3.2.9 Receiving the Trail Trace Buffer Messages
The XRT72L52 Framer IC device contains 16 bytes worth of Transmit Trail Trace Buffers, and 16 bytes worth
of Receive Trail Trace Buffers, as described below. The role of the Transmit Trail Trace Buffers are described
in Section 6.1.1.3 and Section 6.2.4.2.2.
The XRT72L52 DS3/E3 Framer IC contains 16 Receive Trail Trace Buffer registers (e.g., RxTTB-0 through
RxTTB-15). The purpose of these registers are to receive and store the incoming Trail Access Point Identifier
from the Remote Transmitting Terminal.
The Local Receiving Terminal will use this information to verify that it is still receiving data from its intended
transmitter. The specific use of these registers follows.
For Trail Trace Buffer purposes, the Remote Transmit E3 Framer block will group 16 consecutive E3 frames in-
to a Trail Trace Buffer super-frame. When the Remote Transmit E3 Framer is generating the first E3 frame,
within a Trail Trace Buffer super-frame, it will insert the value [1, C6, C5, C4, C3, C2, C1, C0], into the TR byte-
field of this Outbound E3 frame. The remaining 15 TR byte-fields (within this Trail Trace Buffer super-frame)
will consists of ASCII characters that are required for the E.164 numbering format.
When the Local Receive E3 Framer block receives an E3 frame, containing a value in the TR byte that has a
“1” in the MSB position, then it (the Receive E3 Framer block) will write this value into the RxTTB-0 Register
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