XR72L52 Datasheet, PDF (226/480 Pages) Exar Corporation – TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L52
REV. 1.0.1
xr
TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
RX DS3 LAPD CONTROL REGISTER (ADDRESS = 0X18)
BIT 7
Not Used
BIT 6
Not Used
BIT 5
Not Used
BIT 4
Not Used
BIT 3
Not Used
BIT2
RxLAPD
Enable
RO
RO
RO
RO
RO
R/W
0
0
0
0
0
1
BIT 1
RxLAPD
Interrupt
Enable
R/W
X
BIT 0
RxLAPD
Interrupt
Status
RUR
X
Once the LAPD Receiver has been enabled, it will begin searching for the Flag Sequence octets (0x7E), in the
DL bit-fields, within the incoming DS3 frames. When the LAPD Receiver finds the flag sequence byte, it will
assert the Flag Present bit (Bit 0) within the Rx DS3 LAPD Status Register, as depicted below.
RX DS3 LAPD STATUS REGISTER (ADDRESS = 0X19)
BIT 7
Not Used
BIT 6
RxAbort
RO
RO
X
X
BIT 5
BIT 4
RxLAPD Type[1:0]
RO
RO
X
X
BIT 3
BIT2
RxCR Type RxFCS Error
RO
RO
X
X
BIT 1
End of
Message
RO
X
BIT 0
Flag
Present
RO
1
The receipt of the Flag Sequence octet can mean one of two things.
1. The Flag Sequence byte marks the beginning or end of an incoming LAPD Message.
2. The received Flag Sequence octet could be just one of many Flag Sequence octets that are transmitted via
the DS3 Transport Medium, during idle periods between the transmission of LAPD Messages.
The LAPD Receiver will clear the Flag Present bit as soon as it has received an octet that is something other
than the Flag Sequence octet. At this point, the LAPD Receiver should be receiving either octet #2 of the in-
coming LAPD Message, or an Abort Sequence (e.g., a string of seven or more consecutive 1s). If this next set
of data is an abort sequence, then the LAPD Receiver will assert the RxAbort bit (Bit 6) within the Rx DS3
LAPD Status Register. However, if this next octet is Octet #2 of an incoming LAPD Message, then the Rx DS3
LAPD Status Register will start de-stuffing “zeros” after any consecutive 5 “Ones” and will begin to present
some additional status information on this incoming message. Each of these indicators is presented below in
sequential order.
Bit 3 - RxCR Type - C/R (Command/Response) Type
This bit-field reflects the contents of the C/R bit-field within octet #2 of the LAPD Frame Header. When this bit
is "0" it means that this message is originating from a customer installation. When this bit is "1" it means that
this message is originating from a network terminal.
Bit 4,5 - RxLAPD Type[1, 0] - LAPD Message Type
The combination of these two bit fields indicate the Message Type and the Message Size of the incoming
LAPD Message frame. Table 37 relates the values of Bits 4 and 5 to the Incoming LAPD Message Type/Size.
TABLE 37: THE RELATIONSHIP BETWEEN RXLAPDTYPE[1:0] AND THE RESULTING LAPD MESSAGE TYPE AND SIZE
RXLAPD TYPE[1, 0]
00
01
MESSAGE TYPE
CL Path Identification
Idle Signal Identification
MESSAGE SIZE
76 bytes
76 bytes
210