XR72L52 Datasheet, PDF (297/480 Pages) Exar Corporation – TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
XRT72L52
REV. 1.0.1
TXE3 SERVICE BITS REGISTER (ADDRESS = 0X35)
BIT 7
RO
0
BIT 6
RO
0
BIT 5
BIT 4
Not Used
RO
RO
0
0
BIT 3
RO
0
BIT 2
RO
0
BIT 1
A Bit
R/W
1
BIT 0
N Bit
R/W
0
STEP 2 - Write the value “00” into the TxASource[1:0] bit-fields within the Tx E3 Configuration Register,
as indicated below.
TXE3 CONFIGURATION REGISTER (ADDRESS = 0X30)
BIT 7
Tx BIP-4
Enable
R/W
X
BIT 6
BIT 5
TxASourceSel[1:0]
R/W
R/W
0
0
BIT 4
BIT 3
TxNSourceSel[1:0]
R/W
R/W
X
X
BIT 2
Tx AIS
Enable
R/W
X
BIT 1
Tx LOS
Enable
R/W
X
BIT 0
Tx FAS
Source Select
R/W
X
These two steps will cause the Transmit E3 Framer block to read in the contents of Bit 1 (within the Tx E3 Ser-
vice Bit register) and insert it into the A bit-field within the outbound E3 data stream. Hence, the A bit will be set
to “1”, which will be interpreted as an Alarm Condition, by the Remote Terminal Equipment.
5.2.4.2.2 Configuring the Transmit E3 Framer block to insert the BIP-4 nibble into each outbound E3
frame.
The XRT72L52 Framer IC permits the user to (1) configure the Transmit Section of the device to insert the BIP-
4 value into each outbound E3 frame and (2) to configure the Receive Section of the device to compute and
verify the BIP-4 value, within each inbound’ E3 frame.
These two configurations are accomplished by setting bit 7 (Tx BIP-4 Enable), within the Tx E3 Configuration
Register, to “1”, as indicated below.
TXE3 CONFIGURATION REGISTER (ADDRESS = 0X30)
BIT 7
Tx
BIP-4
Enable
R/W
1
BIT 6
BIT 5
TxASourceSel[1:0]
R/W
R/W
X
X
BIT 4
BIT 3
TxNSourceSel[1:0]
R/W
R/W
X
X
BIT 2
Tx AIS
Enable
R/W
X
BIT 1
Tx LOS
Enable
R/W
X
BIT 0
Tx FAS
Source
Select
R/W
X
Setting this bit-field to “1” accomplishes the following.
• It configures the Transmit E3 Framer block to compute the BIP-4 value of a given E3 frame, and insert in to
the very last nibble, within the very next outbound E3 frame. (Hence, bits 1533 through 1536, within each E3
frame, will function as the BIP-4 value)
• It configures the Receive E3 Framer block to compute and verify the BIP-4 value of each incoming E3 frame.
5.2.4.2.3 Generating Errored E3 Frames
The Transmit E3 Framer block permits the user to insert errors into the framing and error detection overhead
bites (e.g., the FAS pattern, and the BIP-4 nibble) of the outbound E3 data stream in order to support Remote
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