XR72L52 Datasheet, PDF (371/480 Pages) Exar Corporation – TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
XRT72L52
REV. 1.0.1
NOTE: In this case, the XRT72L52 dictates exactly when the very next E3 frame will be generated. The Terminal Equip-
ment is expected to respond appropriately by providing the XRT72L52 with the first bit of the new E3 frame, upon demand.
Hence, in this mode, the XRT72L52 is referred to as the Frame Master and the Terminal Equipment is referred to as the
Frame Slave.
Finally, the XRT72L52 will pulse its TxOH_Ind output pin, one bit-period prior to it processing a given overhead
bit, within the Outbound E3 frame. Since the TxOH_Ind output pin of the XRT72L52 is electrically connected to
the E3_Overhead_Ind whenever the XRT72L52 pulses the TxOH_Ind output pin "High", it will also be driving
the E3_Overhead_Ind input pin (of the Terminal Equipment) "High". Whenever the Terminal Equipment de-
tects this pin toggling "High", it should delay transmission of the very next E3 frame payload bit by one clock
cycle.
The behavior of the signal between the XRT72L52 and the Terminal Equipment for E3 Mode 3 Operation is il-
lustrated in Figure 150.
FIGURE 150. BEHAVIOR OF THE TERMINAL INTERFACE SIGNALS BETWEEN THE XRT72L52 AND THE TERMINAL
EQUIPMENT (E3 MODE 3 OPERATION)
Terminal Equipment Signals
E3_Clock_In
E3_Data_Out
Tx_Start_of_Frame
E3_Overhead_Ind
Payload[4238] Payload[4239]
FA1, Bit 7
FA1, Bit 6
XRT72L5x Transmit Payload Data I/F Signals
TxInClk
TxSer
Payload[4238] Payload[4239]
TxFrame
TxOH_Ind
FA1, Bit 7
FA1, Bit 6
E3 Frame Number N
Note: TxFrame pulses high to denote
E3 Frame Boundary.
Note: TxOH_Ind pulses high for
16 bit periods in order to
denote Overhead Data
(e.g., the FA1 and FA2 bytes)
E3 Frame Number N + 1
Note: The FA1 byte will not be processed by the
Transmit Payload Data Input Interface.
How to configure the XRT72L52 to operate in this mode.
1. Set the NibIntf input pin "Low".
2. Set the TimRefSel[1:0] bit-fields (within the Framer Operating Mode Register) to "1X".
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