XR72L52 Datasheet, PDF (150/480 Pages) Exar Corporation – TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L52
REV. 1.0.1
xr
TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
4.2.1 The Transmit Payload Data Input Interface Block
FIGURE 31. THE TRANSMIT PAYLOAD DATA INPUT INTERFACE BLOCK
TxOHInd
TxSer
TxNib[3:0]
T x In C lk
T x N ib C lk
TxNibFram e
T xFram e
T xFram eR ef
Transmit
Payload Data
Input Interface
Block
To Transm it DS3
Fram er Block
TABLE 15: DESCRIPTIONS FOR THE PINS ASSOCIATED WITH THE TRANSMIT PAYLOAD DATA INPUT INTERFACE
SIGNAL NAME
TxSer
TxNib[3:0]
TxNibFrame
TxInClk
TxNibClk
TYPE
DESCRIPTION
I ^{Transmit Serial Payload Data Input Pin:}
To operate the XRT72L52 in the serial mode, the Terminal Equipment is expected to apply the pay-
load data that is to be transported via the outbound DS3 data stream to this input pin. The
XRT72L52 samples the data that is at this input pin upon the rising edge of either the RxOutClk or
the TxInClk signal (whichever is appropriate). This signal is only active if the NibIntf input pin is
pulled "Low".
I ^{Transmit Nibble-Parallel Payload Data Input pins:}
To operate the XRT72L52 in the Nibble-Parallel mode, the Terminal Equipment is expected to ap-
ply the payload data that is to be transported via the outbound DS3 data stream to these input pins.
The XRT72L52 samples the data that is at these input pins upon the rising edge of the TxNibClk
signal. These pins are only active if the NibIntf input pin is pulled "High".
O ^{Transmit End of Frame Output Indicator - Nibble Mode}
The Transmit Section of the XRT72L52 pulses this output pin "High" for one nibble-period when
the Transmit Payload Data Input Interface is processing the last nibble of a given DS3 frame.
The purpose of this output pin is to alert the Terminal Equipment that it needs to begin transmission
of a new DS3 frame to the XRT72L52.
I ^{Transmit Section Timing Reference Clock Input pin:}
The Transmit Section of the XRT72L52 can be configured to use this clock signal as the Timing
Reference. If this configuration is selected, then the XRT72L52 uses this clock signal to sample
the data on the TxSer input pin and a DS3 or E3 clock signal must be applied to this pin.
O ^{Transmit Nibble Mode Output}
To operate the XRT72L52 in the Nibble-Parallel mode, then the XRT72L52 will derive this clock
signal from the selected Timing Reference for the Transmit Section of the chip (e.g., either the Tx-
InClk or the RxLineClk signals).
It is advisable to configure the Terminal Equipment to output the outbound payload data (to the
XRT72L52 Framer IC) onto the TxNib[3:0] input pins, upon the rising edge of this clock signal.
For DS3 Applications, the XRT72L52 Framer IC will output 1176 clock edges (to the Terminal
Equipment) for each outbound DS3 frame.
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