XR72L52 Datasheet, PDF (454/480 Pages) Exar Corporation – TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L52
REV. 1.0.1
xr
TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
TABLE 88: LISTING AND DESCRIPTION OF THE PIN ASSOCIATED WITH THE RECEIVE PAYLOAD DATA OUTPUT
INTERFACE BLOCK
SIGNAL NAME TYPE
DESCRIPTION
RxFrame
Output
Receive Start of Frame Output Indicator:
The exact behavior of this pin, depends upon whether the XRT72L52 has been configured to
operate in the Serial Mode or the Nibble-Parallel Mode.
Serial Mode Operation:
The Receive Section of the XRT72L52 will pulse this output pin "High" (for one bit period)
when the Receive Payload Data Output Interface block is driving the very first bit of a given E3
frame, onto the RxSer output pin.
Nibble-Parallel Mode Operation:
The Receive Section of the XRT72L52 will pulse this output pin "High" for one nibble period,
when the Receive Payload Data Output Interface is driving the very first nibble of a given E3
frame, onto the RxNib[3:0] output pins.
Operation of the Receive Payload Data Output Interface block
The Receive Payload Data Output Interface permits the user to read out the payload data of Inbound E3
frames, via either of the following modes.
• Serial Mode
• Nibble-Parallel Mode
Each of these modes are described in detail, below.
6.3.5.1 Serial Mode Operation Behavior of the XRT72L52
If the XRT72L52 has been configured to operate in this mode, then the XRT72L52 will behave as follows.
Payload Data Output
The XRT72L52 will output the payload data, of the incoming E3 frames, upon the rising edge of RxClk.
Delineation of Inbound E3 Frames
The XRT72L52 will pulse the RxFrame output pin "High" for one bit-period, coincident with it driving the first bit
within a given E3 frame, via the RxSer output pin.
Interfacing the XRT72L52 to the Receive Terminal Equipment
Figure 196 presents a simple illustration as how the user should interface the XRT72L52 to that terminal equip-
ment which processes Receive Direction payload data.
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