XR72L52 Datasheet, PDF (28/480 Pages) Exar Corporation – TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L52
REV. 1.0.1
PIN DESCRIPTION
PIN #
115
PIN NAME
RDY_DTCK
116
INT
117
NC
118
RxNib3[0]/
RxHDLCDat3[0]
119
RxNib2[0]/
RxHDLCDat2[0]
120
RxNib1[0]/
RxHDLCDat1[0]
xr
TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
TYPE
DESCRIPTION
O READY or DTACK:
This active-low output pin functions as the READY output when the micropro-
cessor interface is running in the Intel Mode and functions as the DTACK output
when the microprocessor interface is running in the Motorola Mode.
Intel Mode - READY Output:
When the Framer negates this output pin (e.g., toggles it "Low"), it indicates to
the µP that the current READ or WRITE cycle is completed.
Motorola Mode - DTACK (Data Transfer Acknowledge) Output:
The Framer asserts this pin in order to inform the local microprocessor that the
present READ or WRITE cycle is nearly complete. If the Framer requires that
the current READ or WRITE cycle be extended, then the Framer delays its
assertion of this signal. The 68000 family of µPs requires this signal from its
peripheral devices in order to quickly and properly complete a READ or WRITE
cycle.
O Interrupt Request Output:
This open-drain, active-low output signal is asserted when the Framer is
requesting interrupt service from the local microprocessor. This output pin
should typically be connected to the Interrupt Request input of the local micro-
processor.
O Receive Nibble Output - 3:
The Framer IC outputs Received data from the Remote Terminal to the local Ter-
minal Equipment via this pin along with RxNib0, RxNib1 and RxNib2.
The data at this pin is updated on the rising edge of the RxClk output signal.
NOTE: This output pin is active only if the Nibble-Parallel Mode has been
selected.
Receive HDLC Data Output - 3:
This pin contains bit 3 RxHDLC data when the HDLC controller is on.
O Receive Nibble Output - 2:
The Framer IC outputs Received data from the Remote Terminal to the local Ter-
minal Equipment via this pin along with RxNib0, RxNib1 and RxNib2.
The data at this pin is updated on the rising edge of the RxClk output signal.
NOTE: This output pin is active only if the Nibble-Parallel Mode has been
selected.
Receive HDLC Data Output - 2:
This pin contains bit 2 RxHDLC data when the HDLC controller is on.
O Receive Nibble Output - 1:
The Framer IC outputs Received data from the Remote Terminal to the local Ter-
minal Equipment via this pin along with RxNib0, RxNib2 and RxNib3.
The data at this pin is updated on the rising edge of the RxClk output signal.
NOTE: This output pin is active only if the Nibble-Parallel Mode has been
selected.
Receive HDLC Data Output - 1:
This pin contains bit 1 RxHDLC data when the HDLC controller is on.
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