XR72L52 Datasheet, PDF (43/480 Pages) Exar Corporation – TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
AC ELECTRICAL CHARACTERISTICS (CONT.)
Test Conditions: TA = 25°C, VDD = 3.3V + 5% unless otherwise specified
SYMBOL
PARAMETER
MIN. TYP.
t₆₅ CS Hold Time from ALE_AS Low.
1
t₆₆ RD_DS, WR_R/W Pulse Width
87
Intel Type Read Operations (See Figure 17)
t₆₇ Data Valid from RD_DS Low.
32
t₆₈ Data Bus Floating from RD_DS High
9
t₆₉ CS to RD read or write Time
3
t₇₀₁ RD Time to NOT READY (e.g., RDY_DTCK tog-
gling Low)
t₇₀ RD to READY Time (e.g., RDY_DTCK toggling
high)
Intel Type Write Operations (Figure 18)
t₇₁ Data Setup Time to WR_R/W High
0
t₇₂ Data Hold Time from WR_R/W High
3
t₇₃ High Time between Reads and/or Writes
33
t₇₄ ALE to WR Time
3
Microprocessor Interface - Motorola (See Figure 19)
t₇₈ A[8:0] Setup Time to falling edge of ALE_AS
0
Motorola Type Read Operations (See Figure 19)
t₇₉ Rising edge of RD_DS to rising edge of RDY_DTCK
delay
t₈₀ Rising edge of RDY_DTCK to tri-state of D[7:0]
Motorola Type Write Operations (See Figure 20)
t₈₁ D[7:0] Set-up time to falling edge of RD_DS
0
t₈₂ Rising edge of RD_DS to rising edge of RDY_DTCK
delay
Reset Pulse Width - Both Motorola and Intel Operations (See Figure 21)
t₉₀ Reset pulse width
200
MAX.
UNITS
ns
ns
ns
ns
ns
16
ns
80
ns
ns
ns
ns
ns
ns
16
ns
0
ns
ns
13
ns
ns
XRT72L52
REV. 1.0.1
CONDITIONS
27