XR72L52 Datasheet, PDF (277/480 Pages) Exar Corporation – TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

xr
TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
FIGURE 100. THE TRANSMIT OVERHEAD DATA INPUT INTERFACE BLOCK
XRT72L52
REV. 1.0.1
TxOHFrame
TxOHEnable
TxOH
TxOHClk
TxOHIns
Transmit
Overhead
Data Input
Interface Block
To Transmit E3
Framer Block
The E3, ITU-T G.751 Frame consists of 1536 bits. Of these bits, 1524 are payload bits and the remaining 12
are overhead bits. The XRT72L52 has been designed to handle and process both the payload type and over-
head type bits for each E3 frame. Within the Transmit Section within the XRT72L52, the Transmit Payload Da-
ta Input Interface has been designed to handle the payload data. Likewise, the Transmit Overhead Input Inter-
face has been designed to handle and process the overhead bits.
The Transmit Section of the XRT72L52 generates or processes the various overhead bits within the E3 frame,
in the following manner.
The Frame Alignment Signaling (FAS) Overhead Bits
The FAS (Framing Alignment Signaling) bits are always internally generated by the Transmit Section of the
XRT72L52. Hence, the user cannot insert his/her value for the FAS bits into the outbound E3 data stream, via
the Transmit Overhead Data Input Interface.
The A (Alarm) Overhead bit
The A bit is used to transport the FERF (Far-End Receive Failure) condition. This bit-field can be either inter-
nally generated by the Transmit Section within the XRT72L52, or can be externally generated and inserted into
the outbound E3 data stream, via the Transmit Overhead Data Input Interface.
The N (National) Overhead bit
The E3 frame structure also contains the N bit which can be used to transport a proprietary User Data Link in-
formation and or Path Maintenance Data Link information. The UDL (User Data Link) bits are only accessible
via the Transmit Overhead Data Input Interface. The Path Maintenance Data Link (PMDL) bits can either be
sourced from the Transmit LAPD Controller/Buffer or via the Transmit Overhead Data Input Interface.
Table 44 lists the Overhead Bits within the E3 frame. In addition, this table also indicates whether or not these
overhead bits can be sourced by the Transmit Overhead Data Input Interface.
TABLE 44: A LISTING OF THE OVERHEAD BITS WITHIN THE E3 FRAME, AND THEIR POTENTIAL SOURCES, WITHIN THE
XRT72L52 IC
OVERHEAD BIT
FAS Signal - Bit 9
FAS Signal - Bit 8
INTERNALLY GENERATED
Yes
Yes
ACCESSIBLE VIA THE TRANSMIT OVERHEAD
DATA INPUT INTERFACE
No
No
BUFFER/REGISTER
ACCESSIBLE
Yes
Yes
FAS Signal - Bit 7
Yes
No
Yes
261