XR72L52 Datasheet, PDF (307/480 Pages) Exar Corporation – TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
FIGURE 115. THE XRT72L52 RECEIVE SECTION CONFIGURED TO OPERATE IN THE E3 MODE
RxOHFrame
RxOHEnable
RxOH
RxOHClk
Receive
OverhReeacdeIinvpeut
InOtevrfearcheeBadloIcnkput
Interface Block
XRT72L52
REV. 1.0.1
RxOHInd
RxSer
RxNib[3:0]
RxClk
RxFrame
Receive
PayloRaedcDeiaveta
PaInyplouatd Data
InterfacInepBultock
Interface Block
Receive DS3/E3
FRraemceeirveBDloSck3/E3
Framer Block
Receive LIU
IRnteecrefaivceeLIU
BInlotecrkface
Block
RxPOS
RxNEG
RxLineClk
From Microprocessor
Interface Block
Receive E3
RHeDcLeCive E3
ControlHleDr/LBCuffer
Controller/Buffer
Each of these functional blocks will be discussed in detail in this document.
5.3.1 The Receive E3 LIU Interface Block
The purpose of the Receive E3 LIU Interface block is two-fold:
1. To receive encoded digital data from the E3 LIU IC.
2. To decode this data, convert it into a binary data stream and to route this data to the Receive E3 Framer
block.
Figure 116 presents a simple illustration of the Receive E3 LIU Interface block.
FIGURE 116. THE RECEIVE E3 LIU INTERFACE BLOCK
To Receive E3
Framer Block
Receive
E3 LIU Interface
Block
RxPOS
RxNEG
RxLineClk
291