XR72L52 Datasheet, PDF (237/480 Pages) Exar Corporation – TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
XRT72L52
REV. 1.0.1
FIGURE 79. ILLUSTRATION OF THE SIGNALS THAT ARE OUTPUT VIA THE RECEIVE OVERHEAD DATA OUTPUT INTER-
FACE BLOCK (FOR METHOD 2).
RxOutClk
RxOHEnable
RxOHFrame
Recommended
Sampling
Edges
RxOH
F1
X
F1
AIC
F0
4.3.5 The Receive Payload Data Output Interface
Figure 80 presents a simple illustration of the Receive Payload Data Output Interface block.
FIGURE 80. THE RECEIVE PAYLOAD DATA OUTPUT INTERFACE BLOCK
RxOHInd
RxSer
RxNib[3:0]
RxClk
RxOutClk
RxFrame
Receive
Payload Data
Output Interface
From Receive DS3
Framer Block
Each of the output pins of the Receive Payload Data Output Interface block are listed in Table 42 and de-
scribed below. The exact role that each of these output pins assume, for a variety of operating scenarios are
described throughout this section.
221