XR72L52 Datasheet, PDF (231/480 Pages) Exar Corporation – TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
XRT72L52
REV. 1.0.1
2. Keep track of the number of rising clock edges that have occurred in the RxOHClk (e.g., the
DS3_OH_Clock_In) signal, since the last time the RxOHFrame signal was sampled "High". By doing this,
the Terminal Equipment will be able to keep track of which overhead bit is being output via the RxOH out-
put pin. Based upon this information, the Terminal Equipment will be able to derive some meaning from
these overhead bits.
Table 39 relates the number of rising clock edges (in the RxOHClk signal, since the RxOHFrame signal was
last sampled "High") to the DS3 Overhead bit that is being output via the RxOH output pin.
TABLE 39: THE RELATIONSHIP BETWEEN THE NUMBER OF RISING CLOCK EDGES IN RXOHCLK, (SINCE
RXOHFRAME WAS LAST SAMPLED "HIGH") TO THE DS3 OVERHEAD BIT, THAT IS BEING OUTPUT VIA THE RXOH
OUTPUT PIN
NUMBER OF RISING CLOCK EDGES IN RXOHCLK
THE OVERHEAD BIT BEING OUTPUT BY THE
XRT72L52
0 (Clock edge is coincident with RxOHFrame being detected "High")
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
X
F1
AIC
F0
NA
F0
FEAC
F1
X
F1
UDL
F0
UDL
F0
UDL
F1
P
F1
CP
F0
CP
F0
CP
F1
P
F1
215