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XR72L52 Datasheet, PDF (462/480 Pages) Exar Corporation – TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
XRT72L52
REV. 1.0.1
xr
TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
RXE3 CONFIGURATION & STATUS REGISTER 2 (ADDRESS = 0X11)
BIT 7
Rx LOF Algo
BIT 6
RxLOF
R/W
RO
X
X
BIT 5
RxOOF
RO
X
BIT 4
RxLOS
RO
X
BIT 3
RxAIS
RO
X
BIT 2
RxPld Unstab
RO
X
BIT 1
Rx
TMark
RO
X
BIT 0
RxFERF
RO
X
If the OOF state is TRUE
1. It should transmit a FERF (Far-End-Receive Failure) indicator to the Remote Terminal Equipment. The
XRT72L52 Framer IC automatically supports this action via the FERF-upon-OOF feature.
If the OOF state is FALSE
1. It should cease transmitting the FERF indication to the Remote Terminal Equipment. The XRT72L52
Framer IC automatically supports this action via the FERF-upon-OOF feature.
6.3.6.2.3 The Change in Receive LOF Condition Interrupt
If the Change in Receive LOF Condition Interrupt is enabled, then the XRT72L52 Framer IC will generate an
interrupt in response to either of the following conditions.
1. When the XRT72L52 Framer IC declares an LOF (Out of Frame) Condition, and
2. When the XRT72L52 Framer IC clears the LOF condition.
Conditions causing the XRT72L52 Framer IC to declare an LOF Condition.
• If the Receive E3 Framer block (within the XRT72L52 Framer IC) detects Framing Byte errors, within four
consecutive incoming E3 frames and is not able to transition back into the In-Frame state within 1 or 3ms.
Conditions causing the XRT72L52 Framer IC to clear the LOF Condition.
• If the Receive E3 Framer block transitions from the OOF Condition state to the LOF Condition state (see
Figure 182).
• If the Receive E3 Framer block transitions back into the In-Frame state.
Enabling and Disabling the Change in Receive LOF Condition Interrupt
The user can enable or disable the Change in Receive LOF Condition Interrupt, by writing the appropriate val-
ue into Bit 2 (LOF Interrupt Enable), within the RxE3 Interrupt Enable Register - 1, as indicated below.
RXE3 INTERRUPT ENABLE REGISTER - 1 (ADDRESS = 0X12)
BIT 7
BIT 6
Not Used
BIT 5
RO
RO
RO
0
0
0
BIT 4
COFA
Interrupt
Enable
R/W
0
BIT 3
OOF
Interrupt
Enable
R/W
0
BIT 2
LOF
Interrupt
Enable
R/W
X
BIT 1
LOS
Interrupt
Enable
R/W
0
BIT 0
AIS
Interrupt
Enable
R/W
0
Setting this bit-field to “1” enables this interrupt. Conversely, setting this bit-field to “0” disables this interrupt.
Servicing the Change in Receive LOF Condition Interrupt
Whenever the XRT72L52 Framer IC detects this interrupt, it will do all of the following.
• It will assert the Interrupt Request output pin (Int), by driving it "Low".
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