XR72L52 Datasheet, PDF (270/480 Pages) Exar Corporation – TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L52
REV. 1.0.1
xr
TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
The XRT72L52 will accept the E3 payload data, from the Terminal Equipment in a nibble-parallel manner, via
the TxNib[3:0] input pins. The Transmit Terminal Equipment Input Interface block will latch this data into its cir-
cuitry, on the rising edge of the TxNibClk output signal.
C. Delineation of the outbound E3 frames
The XRT72L52 will pulse the TxNibFrame output pin "High" for one bit-period coincident with the XRT72L52
processing the last nibble of a given E3 frame.
D. Sampling of payload data, from the Terminal Equipment
In Mode 4, the XRT72L52 will sample the data, at the TxNib[3:0] input pins, on the third rising edge of the Rx-
OutClk clock signal, following a pulse in the TxNibClk signal (see Figure 95).
NOTE: The TxNibClk signal, from the XRT72L52 operates nominally at 8.592 MHz (e.g., 34.368 MHz divided by 4).
The E3 Frame consists of 1536 bits or 384 nibbles. Therefore, the XRT72L52 will supply 384 TxNibClk pulses
between the rising edges of two consecutive TxNibFrame pulses. The E3 Frame repetition rate is 22.375kHz.
Hence, 384 TxNibClk pulses for each E3 frame period amounts to TxNibClk running at approximately 8.592
MHz. The method by which the 384 TxNibClk pulses are distributed throughout the E3 frame period is pre-
sented below.
Nominally, the Transmit Section within the XRT72L52 will generate a TxNibClk pulse for every 4 RxOutClk (or
TxInClk) periods.
Interfacing the Transmit Payload Data Input Interface block of the XRT72L52 to the Terminal Equipment
for Mode 4 Operation
Figure 94 presents an illustration of the Transmit Payload Data Input Interface block (within the XRT72L52) be-
ing interfaced to the Terminal Equipment, for Mode 4 Operation.
FIGURE 94. THE TERMINAL EQUIPMENT BEING INTERFACED TO THE TRANSMIT PAYLOAD DATA INPUT INTERFACE
BLOCK FOR MODE 4 (NIBBLE-PARALLEL/LOOP-TIMED) OPERATION
E3_Nib_Clock_In
E3_Data_Out[3:0]
Tx_Start_of_Frame
E3_Overhead_Ind
8.592MHz
4
VCC
TxNibClk
TxNib[3:0]
TxNibFrame
RxLineClk
TxOH_Ind
NibIntf
34.368MHz
Terminal Equipment
E3 Framer
Mode 4 Operation of the Terminal Equipment
When the XRT72L52 is operating in this mode, it will function as the source of the 8.592MHz (e.g., the
34.368MHz clock signal divided by 4) clock signal, that will be used as the Terminal Equipment Interface clock
by both the XRT72L52 and the Terminal Equipment.
The Terminal Equipment will output the payload data of the outbound E3 data stream via its E3_Data_Out[3:0]
pins on the rising edge of the 8.592MHz clock signal at the E3_Nib_Clock_In input pin.
The XRT72L52 will latch the outbound E3 data stream (from the Terminal Equipment) on the rising edge of the
TxNibClk output clock signal. The XRT72L52 will indicate that it is processing the last nibble, within a given E3
frame, by pulsing its TxNibFrame output pin "High" for one TxNibClk clock period. When the Terminal Equip-
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