XR72L52 Datasheet, PDF (131/480 Pages) Exar Corporation – TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
2.3.8.20 Line Interface Scan Register
LINE INTERFACE SCAN REGISTER (ADDRESS = 0X81)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
Not Used
RO
RO
RO
RO
RO
0
0
0
0
0
BIT 2
DMO
RO
0
XRT72L52
REV. 1.0.1
BIT 1
RLOL
RO
1
BIT 0
RLOS
RO
1
Bit 2 - DMO - (Drive Monitor Output)
This Read-Only bit-field indicates the logic state of the DMO[n] input pin of the Framer device. This input pin is
intended to be connected to the DMO output pin of an Exar XRT73L0X-type of DS3/E3 LIU IC. If this bit-field
contains a logic "1", then the DMO input pin is "High". An Exar XRT73L0X-type of DS3/E3 LIU IC will set this
pin "High" if the drive monitor circuitry (within the LIU device) has not detected any bipolar signals at the MTIP
and MRING inputs (of the LIU device) within the last 128 + 32 bit periods.
Conversely, if this bit-field contains a logic "0", then the DMO input pin is "High". The DS3/E3 LIU IC will set
this pin "Low" if bipolar signals are being detected at the MTIP and MRING input pins.
As a consequence, the DMO output pin can be thought of as a Transmit Driver Failure indicator.
NOTE: If this customer is not using an Exar XRT73L0X-type of DS3/E3 LIU IC, then this input pin and bit-field can be used
for a variety of other purposes.
Bit 1 - RLOL - (Receive Loss of Lock)
This Read-Only bit-field indicates the logic state of the RLOL[n] input pin of the Framer device. This input pin
is intended to be connected to the RLOL output pin of an Exar XRT73L0X-type of DS3/E3 LIU IC. If this bit-
field contains a logic "1", then the RLOL[n] input pin is "High". An Exar XRT73L0X-type of DS3/E3 LIU IC will
set this pin "High" if the clock recovery phase-locked-loop circuitry (within the LIU device) has lost lock with the
incoming DS3/E3 data-stream and is not properly recovering clock and data.
Conversely, if this bit-field contains a logic "0", then the RLOL input pin is "Low". The DS3/E3 LIU IC will hold
this pin "Low" as long as this clock recovery phase-locked-loop circuitry (within the LIU device) is properly
locked onto the incoming DS3 or E3 data-stream, and is properly recovering clock and data from this data-
stream.
For more information on the operation of these Exar XRT73L0X-type of DS3/E3/STS-1 LIU ICs, please consult
any of the following data sheets.
• XRT7300 1-Channel DS3/E3/STS-1 LIU IC (5V)
• XRT73L02A 1-Channel DS3/E3/STS-1 LIU IC (3.3V)
• XRT7302 2-Channel DS3/E3/STS-1 LIU IC (5V)
• XRT73L03 3-Channel DS3/E3/STS-1 LIU IC (3.3V)
• XRT73L04 4-Channel DS3/E3/STS-1 LIU IC (3.3V)
NOTE: If the customer is not using an Exar XRT73L0X-type of DS3/E3/STS-1 IC, then this bit-field, and the RLOL[n] input
pin can be used for other purposes.
Bit 0 - RLOS - (Receive Loss of Signal)
This Read-Only bit-field indicates the logic state of the RLOS[n] input pin of the Framer device. This input pin
is intended to be connected to the RLOS output pin of the DS3/E3 LIU IC. If this bit-field contains a logic "1",
then the RLOS[n] input pin is "High". The LIU device will toggle this signal "High" if it (the LIU IC) is currently
declaring an LOS (Loss of Signal) condition.
Conversely, if this bit-field contains a logic "0", then the RLOS input pin is "Low". The LIU device will hold this
signal "Low" if it is NOT currently declaring an LOS (Loss of Signal) condition.
For more information on the LOS Declaration and Clearance criteria within the Exar XRT73L0X type of DS3/
E3/STS-1 LIU IC, please consult any of the following data sheets.
• XRT7300 1-Channel DS3/E3/STS-1 LIU IC (5V)
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