XR72L52 Datasheet, PDF (456/480 Pages) Exar Corporation – TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L52
REV. 1.0.1
xr
TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
FIGURE 197. AN ILLUSTRATION OF THE BEHAVIOR OF THE SIGNALS BETWEEN THE RECEIVE PAYLOAD DATA OUT-
PUT INTERFACE BLOCK OF THE XRT72L52 AND THE TERMINAL EQUIPMENT
Terminal Equipment Signals
E3_Clock_In
E3_Data_In
Rx_Start_of_Frame
E3_Overhead_Ind
Payload[1522] Payload[1523]
FAS, Bit 9
FAS, Bit 8
XRT72L5x Receive Payload Data I/F Signals
RxClk
RxSer
Payload[1532] Payload[1533]
RxFrame
RxOH_Ind
FAS, Bit 9
FAS, Bit 8
E3 Frame Number N
Note: RxFrame pulses high to denote
E3 Frame Boundary.
Note: RxOH_Ind pulses high to
denote Overhead Data
(e.g., the FAS, A and N bits).
E3 Frame Number N + 1
Note: FAS, A and N-Bits will not be processed by the
Transmit Payload Data Input Interface.
6.3.5.2 Nibble-Parallel Mode OperationBehavior of the XRT72L52
If the XRT72L52 has been configured to operate in the Nibble-Parallel Mode, then the XRT72L52 will behave
as follows.
Payload Data Output
The XRT72L52 will output the payload data of the incoming E3 frames, via the RxNib[3:0] output pins, upon the
rising edge of RxClk.
NOTES:
1. In this case, RxClk will function as the Nibble Clock signal between the XRT72L52 the Terminal Equipment. The
XRT72L52 will pulse the RxClk output signal "High" 1060 times, for each Inbound E3 frame.
2. Unlike Serial Mode operation, the duty cycle of RxClk, in Nibble-Parallel Mode operation is approximately 25%.
Delineation of Inbound E3 Frames
The XRT72L52 will pulse the RxFrame output pin "High" for one nibble-period coincident with it driving the very
first nibble, within a given Inbound E3 frame, via the RxNib[3:0] output pins.
Interfacing the XRT72L52 the Terminal Equipment.
Figure 198 presents a simple illustration as how the user should interface the XRT72L52 to that terminal equip-
ment which processes Receive Direction payload data.
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