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XR72L52 Datasheet, PDF (204/480 Pages) Exar Corporation – TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
XRT72L52
REV. 1.0.1
xr
TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
FIGURE 61. THE RECEIVE DS3 LIU INTERFACE BLOCK
To Receive DS3
Framer Block
Receive
DS3 LIU
Interface Block
RxPOS
RxNEG
RxLineClk
The Receive Section of the XRT72L52 will via the Receive DS3 LIU Interface Block receive timing and data in-
formation from the incoming DS3 data stream. The DS3 Timing information will be received via the RxLineClk
input pin and the DS3 data information will be received via the RxPOS and RxNEG input pins. The Receive
DS3 LIU Interface block is capable of receiving DS3 data pulses in unipolar or bipolar format. If the Receive
DS3 framer is operating in the bipolar format, then it can be configured to decode either AMI or B3ZS line code
data. Each of these input formats and line codes will be discussed in detail, below.
4.3.1.1 Unipolar Decoding
If the Receive DS3 LIU Interface block is operating in the Unipolar (single-rail) mode, then it will receive the
Single Rail NRZ DS3 data pulses via the RxPOS input pin. The Receive DS3 LIU Interface block will also re-
ceive its timing signal via the RxLineClk signal.
NOTE: The RxLineClk signal will function as the timing source for the entire Receive Section of the XRT72L52.
No data pulses will be applied to the RxNEG input pin. The Receive DS3 LIU Interface block receives a logic
"1" when a logic "1" level signal is present at the RxPOS pin, during the sampling edge of the RxLineClk signal.
Likewise, a logic "0" is received when a logic "0" level signal is applied to the RxPOS pin. Figure 62 presents
an illustration of the behavior of the RxPOS, RxNEG and RxLineClk input pins when the Receive DS3 LIU In-
terface block is operating in the Unipolar mode.
FIGURE 62. BEHAVIOR OF THE RXPOS, RXNEG AND RXLINECLK SIGNALS DURING DATA RECEPTION OF UNIPOLAR
DATA
Data 1 0 1 1 0 0 1 0 0 1 1 1 0 1 0 1 0 0 1
RxPOS
1 10
01
RxNEG
RxLineClk
The user can configure the Receive DS3 LIU Interface block to operate in either the Unipolar or the Bipolar
Mode by writing the appropriate data to the I/O Control Register, as depicted below.
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