M32C80 Datasheet, PDF (94/352 Pages) Renesas Technology Corp – 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES

M32C/80 Group
8. Clock Generation Circuit
Table 8.8 Interrupts to Exit Wait Mode
Interrupt
NMI Interrupt
Serial I/O Interrupt
When CM02=0
Available
Available when the internal and
external clocks are used
Key Input Interrupt
A/D Conversion Interrupt
Timer A Interrupt
Timer B Interrupt
Available
Available in single or single-sweep
mode
Available in all modes
INT Interrupt
Intelligent I/O Interrupt
Available
Available
When CM02=1
Available
Available when the external clock or f2n
(when XIN clock or on-chip oscillator is
selected) is used
Available
Do not use
Available in event counter mode or when
count source is fC32 or f2n (when XIN clock or
on-chip oscillator is selected)
Available
Do not use
8.5.3 Stop Mode
In stop mode, all oscillators and resonators stop. The CPU clock and peripheral function clock, as well as
the CPU and peripheral functions operated by these clocks, also stop. The least power required to
operate the microcomputer is in stop mode. The internal RAM holds its data when the voltage applied to
the VCC1 and VCC2 pins is VRAM or more. If the voltage applied to the VCC1 and VCC2 pins is 2.7 V or less,
the voltage must be Vcc1 ≥ Vcc2 ≥ VRAM.
The following interrupts can be used to exit stop mode:
_______
• NMI interrupt
• Key Input Interrupt
______
• INT interrupt
• Timer A and B interrupt (Available when the timer counts external pulse, having its 100 Hz or less
frequency, in event counter mode)
Rev. 1.00 Nov. 01, 2005 Page 75 of 330
REJ09B0271-0100