M32C80 Datasheet, PDF (63/352 Pages) Renesas Technology Corp – 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES

M32C/80 Group
7. Bus
7.2.3 Read and Write Signals
_____ ______
When using a 16-bit data bus, the PM02 bit in the PM0 register selects a combination of the "RD, WR and
________
_____ ________
_________
BHE" signals or the "RD, WRL and WRH" signals to determine the read or write signal. When the DS3 to
_____ ______ ________
DS0 bits in the DS register are set to "0" (8-bit data bus), set the PM02 bit to "0" (RD/WR/BHE). When
any of the DS3 to DS0 bits are set to "1" (16-bit data bus) to access an 8-bit space, the combination of
_____ ______
________
"RD, WR and BHE" is automatically selected regardless of the PM02 bit setting. Tables 7.3 and 7.4 list
each signal operation.
_____ ______
________
The RD, WR and BHE signals are combined for the read or write signal after reset.
_____ ________
_________
When changing the combination of "RD, WRL and WRH", set the PM02 bit first to write data to an external
memory.
_____ ________
_________
Table 7.3 RD, WRL and WRH Signals
Data Bus
RD
WRL
WRH
Status of External Data Bus
L
H
H
Read data
16 Bits
H
L
H
Write 1-byte data to even address
H
H
L
Write 1-byte data to odd address
H
L
L
Write data to both even and odd addresses
8 Bits
H
L⁽¹⁾
Not used Write 1-byte data
L
H⁽¹⁾
Not used Read 1-byte data
NOTE:
______
_______
1. The WR signal is used instead of the WRL signal.
_____ ______
________
Table 7.4 RD, WR and BHE Signals
Data Bus
RD
WR
H
L
L
H
16 Bits
H
L
L
H
H
L
L
H
8 Bits
H
L
L
H
BHE
L
L
H
H
L
L
Not used
Not used
A0
H
H
L
L
L
L
H/L
H/L
Status of External Data Bus
Write 1-byte data to odd address
Read 1-byte data from odd address
Write 1-byte data to even address
Read 1-byte data from even address
Write data to both even and odd addresses
Read data from both even and odd addresses
Write 1-byte data
Read 1-byte data
Rev. 1.00 Nov. 01, 2005 Page 44 of 330
REJ09B0271-0100