M32C80 Datasheet, PDF (272/352 Pages) Renesas Technology Corp – 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES

M32C/80 Group
21. Intelligent I/O (Communication Function)
SI/O Special Communication Interrupt Detect Register 1^(1,2)
b7 b6 b5 b4 b3 b2 b1 b0
00
Symbol
G1IRF
Address
013E16
After Reset
0016
Bit
Symbol
Bit Name
Function
RW
Reserved Bit
Set to "0"
RW
(b1 - b0)
Bit Stuffing Error 0: Not detected
BSERR _{Detect Flag}
1: Detected
RW
Arbitration Lost 0: Not detected
ABT _{Detect Flag}
1: Detected
RW
IRF0
Interrupt Source
Determination
Flag 0
0: The G1DR register (receive data register)
does not match the G1CMP0 register
1: The G1DR register (receive data register) ^RW
matches the G1CMP0 register
IRF1
Interrupt Source
Determination
Flag 1
0: The G1DR register (receive data register)
does not match the G1CMP1 register
1: The G1DR register (receive data register) ^RW
matches the G1CMP1 register
IRF2
Interrupt Source
Determination
Flag 2
0: The G1DR register (receive data register)
does not match the G1CMP2 register
1: The G1DR register (receive data register)
RW
matches the G1CMP2 register
IRF3
Interrupt Source
Determination
Flag 3
0: The G1DR register (receive data register)
does not match the G1CMP3 register
1: The G1DR register (receive data register)
RW
matches the G1CMP3 register
NOTES:
1. The G1IRF register is used in HDLC data processing mode. Maintain the value after reset or set it to
"0016" in clock synchronous serial I/O mode.
2. The SRT1R bit in the IIO4IR register is also set to "1" if the IRF3 to IRF0, BSERR, or ABT bit is set to "1".
Transmit Buffer (Receive Data) Register (i=0,1)
b7
b0
Symbol
Address
After Reset
G0TB, G0DR 00EA16
Indeterminate
G1TB, G1DR 012A16
Indeterminate
Function
RW
Set data to be transmitted.
In HDLC data processing mode, the receive data register is read by
reading the GiTB register. Value is written to the transmit buffer register RW
by writing it to the GiTB register. In HDLC data processing mode, the
value set in the GiRI register is transferred to the GiDR register.
Figure 21.9 G1IRF Register, G0TB and G1TB / G0DR and G1DR Registers
Rev. 1.00 Nov. 01, 2005 ^{Page 253} of 330
REJ09B0271-0100