M32C80 Datasheet, PDF (286/352 Pages) Renesas Technology Corp – 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES

M32C/80 Group
Input Port (P85)
Data Bus
NMI
Figure 22.4 Programmable I/O Ports (4)
22. Programmable I/O Ports
Port Pi Direction Register (i=0 to 10) ⁽²⁾
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
PD0 to PD3
PD4 to PD7
PD8
PD9, PD10
Address
03E216, 03E316, 03E616, 03E716
03EA16, 03EB16, 03C216, 03C316
03C616(3)
03C716(1), 03CA16
After Reset
0016
0016
00X0 00002
0016
Bit
Symbol
Bit Name
PDi_0 ^{Port Pi0 Direction}
Bit
Function
RW
0: Input mode (Functions as input port)
1: Output mode (Functions as output port) ^RW
PDi_1
Port Pi1 Direction
Bit
0: Input mode (Functions as input port)
1: Output mode (Functions as output port) ^RW
PDi_2 ^{Port Pi2 Direction}
Bit
0: Input mode (Functions as input port)
1: Output mode (Functions as output port) ^RW
PDi_3 ^{Port Pi3 Direction}
Bit
0: Input mode (Functions as input port)
1: Output mode (Functions as output port) ^RW
PDi_4 ^{Port Pi4 Direction 0: Input mode (Functions as input port)}
RW
Bit
1: Output mode (Functions as output port)
PDi_5 ^{Port Pi5 Direction}
Bit
0: Input mode (Functions as input port)
1: Output mode (Functions as output port) ^RW
PDi_6
Port Pi6 Direction
Bit
0: Input mode (Functions as input port)
1: Output mode (Functions as output port) ^RW
PDi_7 ^{Port Pi7 Direction}
Bit
0: Input mode (Functions as input port)
1: Output mode (Functions as output port) ^RW
NOTES:
1. Set the PD9 register immediately after the PRC2 bit in the PRCR register is set to "1" (write enabled).
Do not generate an interrupt or a DMA transfer between the instruction to set the PRC2 bit to "1" and
the instruction to set the PD9 register.
2. In memory expansion mode and microprocessor mode, the PDi register cannot control pins being
used as bus control pins (A0 to A22, A23, D0 to D15, CS0 to CS3, WRL/WR, WRH/BHE,
BCLK/ALE/CLKOUT, RD, HLDA/ALE, HOLD, ALE and RDY).
3. Nothing is assigned in the PD8_5 bit in the PD8 register.
If write, set these bits to "0". When read, their contents are indeterminate.
Figure 22.5 PD0 to PD10 Registers
Rev. 1.00 Nov. 01, 2005 ^{Page 267} of 330
REJ09B0271-0100