M32C80 Datasheet, PDF (120/352 Pages) Renesas Technology Corp – 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES

M32C/80 Group
10. Interrupts
10.10 Address Match Interrupt
The address match interrupt occurs immediately before executing an instruction that is stored into an ad-
dress indicated by the RMADi register (i=0 to 7). The address match interrupt can be set in eight ad-
dresses. The AIERi bit in the AIER register determines whether the interrupt is enabled or disabled. The I
flag and IPL do not affect the address match interrupt.
Figure 10.12 shows registers associated with the address match interrupt.
The starting address of an instruction must be set in the RMADi register. The address match interrupt does
not occur when a table data or addresses other than the starting address of the instruction is set.
Address Match Interrupt Enable Register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
AIER
Address
000916
After Reset
0016
Bit
Symbol
Bit Name
Function
RW
AIER0 ^{Address Match}
Interrupt 0 Enable Bit
0: Disables the interrupt
1: Enables the interrupt
RW
Address Match
AIER1 _{Interrupt 1 Enable Bit}
0: Disables the interrupt
1: Enables the interrupt
RW
Address Match
AIER2 _{Interrupt 2 Enable Bit}
0: Disables the interrupt
1: Enables the interrupt
RW
Address Match
AIER3 _{Interrupt 3 Enable Bit}
0: Disables the interrupt
1: Enables the interrupt
RW
Address Match
0: Disables the interrupt
AIER4 _{Interrupt 4 Enable Bit 1: Enables the interrupt}
RW
Address Match
0: Disables the interrupt
AIER5 _{Interrupt 5 Enable Bit 1: Enables the interrupt}
RW
AIER6
Address Match
Interrupt 6 Enable Bit
0: Disables the interrupt
1: Enables the interrupt
RW
AIER7
Address Match
Interrupt 7 Enable Bit
0: Disables the interrupt
1: Enables the interrupt
RW
Address Match Interrupt Register i (i=0 to 7)
b23
b16 b15
b8 b7
b0
Symbol
RMAD0
RMAD1
RMAD2
RMAD3
RMAD4
RMAD5
RMAD6
RMAD7
Address
001216 - 001016
001616 - 001416
001A16 - 001816
001E16 - 001C16
002A16 - 002816
002E16 - 002C16
003A16 - 003816
003E16 - 003C16
Function
After Reset
00000016
00000016
00000016
00000016
00000016
00000016
00000016
00000016
Setting Range
RW
Addressing register for the address match interrupt
00000016 to FFFFFF16 _RW
Figure 10.12 AIER Register and RMAD0 to RMAD7 Registers
Rev. 1.00 Nov. 01, 2005 Page 101 of 330
REJ09B0271-0100