M32C80 Datasheet, PDF (81/352 Pages) Renesas Technology Corp – 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES

M32C/80 Group
8. Clock Generation Circuit
Count Source Prescaler Register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
TCSPR
Address
035F16
After Reset⁽²⁾
0XXX 00002
Bit
Symbol
CNT0
Bit Name
Function
RW
RW
CNT1
CNT2
Division Rate
Select Bit⁽¹⁾
CNT3
If setting value is n, f2n is the
main clock, on-chip oscillator clock ^RW
or PLL clock divided by 2n.
When n is set to "0", no division is RW
selected.
RW
Reserved Bit
(b6 - b4)
When read,
its content is indeterminate
RO
0: Divider stops
CST Operation Enable Bit
1: Divider starts
RW
NOTES:
1. Rewrite the CNT3 to CNT0 bits after the CST bit is set to "0".
2. Value of the TCSPR register is not reset by software reset or watchdog timer reset.
Clock Prescaler Reset Flag
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
CPSRF
Address
034116
After Reset
0XXX XXXX2
Bit
Symbol
Bit Name
Function
RW
Nothing is assigned. When write, set to "0".
(b6 - b0) ^{When read, its content is indeterminate.}
Clock Prescaler Reset ^{When the CPSR bit is set to "1", fC}
CPSR _Flag
divided by 32 is reset.
RW
When read, its content is "0".
Figure 8.6 TCSPR and CPSRF Registers
Rev. 1.00 Nov. 01, 2005 Page 62 of 330
REJ09B0271-0100