M32C80 Datasheet, PDF (268/352 Pages) Renesas Technology Corp – 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES

M32C/80 Group
21. Intelligent I/O (Communication Function)
SI/O Expansion Mode Register 0⁽¹⁾
b7 b6 b5 b4 b3 b2 b1 b0
0
Symbol
G0EMR
Address
00FC16
Bit
Symbol
Bit Name
After Reset
0016
Function
RW
Reserved Bit
Set to "0"
RW
(b0)
CRCV ^{CRC Default Value}
Select Bit
0: Set to "000016"
1: Set to "FFFF16"
RW
ACRC CRC Reset Select Bit
0: Not reset
1: Reset⁽²⁾
RW
BSINT
Bit Stuffing Error
Interrupt Select Bit
0: Not used
1: Used
RW
Receive Source
RXSL _{Switch Bit}
0: ISRxD0 pin
1: G0RI register
RW
TXSL ^{Transmit Source}
0: ISTxD0 pin
RW
Switch Bit
1: G0TO register
b7 b6
CRC0
CRC Generation
0 0: X⁸+X⁴+X+1
RW
Polynomial Select Bit
0 1: Do not set to this value
1 0: X¹⁶+X¹⁵+X²+1
CRC1
1 1: X¹⁶+X¹²+X⁵+1
RW
NOTES:
1. The G0EMR register is used in HDLC data processing mode. Maintain the value after reset or set
it to "0016" in clock synchronous serial I/O mode.
2. CRC is reset when data in the G0CMP3 register matches received data.
SI/O Expansion Mode Register 1⁽¹⁾
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
G1EMR
Address
013C16
After Reset
0016
Bit
Symbol
Bit Name
SMODE
Synchronous Mode
Select Bit
CRCV ^{CRC Default Value}
Select Bit
Function
RW
0: Re-synchronous mode not used
1: Re-synchronous mode
RW
0: Set to "000016"
RW
1: Set to "FFFF16"
0: Not reset
ACRC CRC Reset Select Bit _{1: Reset(2)}
RW
BSINT
Bit Stuffing Error
Interrupt Select Bit
0: Not used
1: Used
RW
Receive Source
0: ISRxD1 pin
RXSL _{Switch Bit}
1: G1RI register
RW
Transmit Source
0: ISTxD1 pin
TXSL _{Switch Bit}
1: G1TO register
RW
b7 b6
CRC0
0 0: X⁸+X⁴+X+1
RW
CRC Generation
0 1: Do not set to this value
Polynomial Select bit _{1 0: X16+X15+X2+1}
CRC1
1 1: X¹⁶+X¹²+X⁵+1
RW
NOTES:
1. The G1EMR register is used in HDLC data processing mode. Maintain the value after reset or set it
to "0016" in clock synchronous serial I/O mode.
2. CRC is reset when data in the G1CMP3 register matches received data.
Figure 21.5 G0EMR and G1EMR Registers
Rev. 1.00 Nov. 01, 2005 ^{Page 249} of 330
REJ09B0271-0100