M32C80 Datasheet, PDF (175/352 Pages) Renesas Technology Corp – 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES

M32C/80 Group
15. Three-Phase Motor Control Timer Functions
15. Three-Phase Motor Control Timer Functions
Three-phase motor driving waveform can be output by using the timers A1, A2, A4 and B2. Table 15.1 lists
specifications of the three-phase motor control timer functions. Table 15.2 lists pin settings. Figure 15.1
shows a block diagram. Figures 15.2 to 15.7 show registers associated with the three-phase motor control
timer functions.
Table 15.1 Three-Phase Motor Control Timer Functions Specification
Item
Three-Phase Waveform Output Pin
Forced Cutoff⁽¹⁾
Specification
___
___
___
Six pins (U, U, V, V, W, W)
_______
Apply a low-level ("L") signal to the NMI pin
Timers to be Used
Timer A4, A1, A2 (used in one-shot timer mode):
___
Timer A4: U- and U-phase waveform control
___
Timer A1: V- and V-phase waveform control
___
Timer A2: W- and W-phase waveform control
Timer B2 (used in timer mode):
Carrier wave cycle control
Dead time timer (three 8-bit timers share reload register):
Dead time control
Output Waveform
Triangular wave modulation, Sawtooth wave modulation
Can output a high-level waveform or a low-level waveform for one cycle;
Can set positive-phase level and negative-phase level separately
Carrier Wave Cycle
Triangular wave modulation: count source x (m+1) x 2
Sawtooth wave modulation: count source x (m+1)
m: setting value of the TB2 register, 000016 to FFFF16
Count source: f1, f8, f2n⁽²⁾, fc32
Three-Phase PWM Output Width Triangular wave modulation: count source x n x 2
Sawtooth wave modulation: count source x n
n : setting value of the TA4, TA1 and TA2 register (of the TA4, TA41, TA1, TA11,
TA2 and TA21 registers when setting the INV11 bit to "1"), 000116 to FFFF16
Count source: f1, f8, f2n⁽²⁾, fc32
Dead Time
Count source x p, or no dead time
p: setting value of the DTT register, 0116 to FF16
Count source: f1, or f1 divided by 2
Active Level
Selected from a high level ("H") or low level ("L")
Positive- and Negative-Phase Con- Positive and negative-phases concurrent active disable function
current Active Disable Function
Positive and negative-phases concurrent active detect function
Interrupt Frequency
For the timer B2 interrupt, one carrier wave cycle-to-cycle basis through 15
time- carrier wave cycle-to-cycle basis can be selected
NOTES:
_______
1. Forced cutoff by the signal applied to the NMI pin is available when the INV02 bit is set to "1" (three-
phase motor control timer functions) and the INV03 bit is set to "1" (three-phase motor control timer
output enabled).
2. The CNT3 to CNT0 bits in the TCSPR register select no division (n=0) or divide-by-2n (n=1 to 15).
Rev. 1.00 Nov. 01, 2005 Page 156 of 330
REJ09B0271-0100