M32C80 Datasheet, PDF (123/352 Pages) Renesas Technology Corp – 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES

M32C/80 Group
10. Interrupts
Interrupt Enable Register
b7 b6 b5 b4 b3 b2 b1 b0
000
Symbol
IIO0IE to IIO4IE
Address
See below
After Reset
0016
Bit
Symbol
Bit Name
Function
RW
IRLT
Interrupt Request 0: Interrupt request is used for DMAC, DMAC II
Select Bit⁽²⁾
1: Interrupt request is used for interrupt
RW
Reserved Bit
(b3 - b1)
(Note 1)
Set to "0"
RW
0: Disables an interrupt by bit 4 in IIOiIR register
RW
1: Enables an interrupt by bit 4 in IIOiIR register
(Note 1)
0: Disables an interrupt by bit 5 in IIOiIR register
RW
1: Enables an interrupt by bit 5 in IIOiIR register
(Note 1)
0: Disables an interrupt by bit 6 in IIOiIR register
RW
1: Enables an interrupt by bit 6 in IIOiIR register
(Note 1)
0: Disables an interrupt by bit 7 in IIOiIR register
RW
1: Enables an interrupt by bit 7 in IIOiIR register
NOTES:
1. See table below for bit symbols.
2. If an interrupt request is used for interrupt, set bit 1, 2, 4 to 7 to "1" after the IRLT bit is set to "1".
Bit Symbols for the Interrupt Enable Register
Symbol
IIO0IE
IIO1IE
IIO2IE
IIO3IE
IIO4IE
Address
00B016
00B116
00B216
00B316
00B416
Bit 7
-
-
-
-
SRT0E
Bit 6
-
-
-
-
SRT1E
Bit 5
SIO0RE
SIO0TE
SIO1RE
SIO1TE
-
Bit 4
G0RIE
G0TOE
G1RIE
G1TOE
-
Bit 3
-
-
-
-
-
Bit 2
-
-
-
-
-
Bit 1
-
-
-
-
-
Bit 0
IRLT
IRLT
IRLT
IRLT
IRLT
SIOiRE: Intelligent I/O Communication Unit i Receive Interrupt Enabled
SIOiTE: Intelligent I/O Communication Unit i Transmit Interrupt Enabled
GiTOE: Intelligent I/O Communication Unit i HDLC Data Processing Function Interrupt Enabled (TO: Output to Transmit)
GiRIE: Intelligent I/O Communication Unit i HDLC Data Processing Function Interrupt Enabled (RI: Input to Receive)
SRTiE: Intelligent I/O Special Communication Function Interrupt Enabled
-: Reserved Bit. Set to "0".
i=0, 1
Figure 10.15 IIO0IE to IIO4IE Registers
Rev. 1.00 Nov. 01, 2005 Page 104 of 330
REJ09B0271-0100